| /Linux-v5.4/arch/unicore32/mm/ |
| D | cache-ucv2.S | 31 movc p0.c5, r0, #14 @ Dcache flush all
35 movc p0.c5, r0, #20 @ Icache invalidate all
70 movc p0.c5, ip, #14 @ Dcache flush all
74 movc p0.c5, ip, #20 @ Icache invalidate all
110 103: movc p0.c5, r10, #11 @ Dcache clean line of R10
120 movc p0.c5, ip, #10 @ Dcache clean all
124 movc p0.c5, ip, #20 @ Icache invalidate all
137 movc p0.c5, ip, #14 @ Dcache flush all
164 1: movc p0.c5, r10, #11 @ Dcache clean line of R10
173 movc p0.c5, ip, #10 @ Dcache clean all
[all …]
|
| D | proc-ucv2.S | 37 movc p0.c5, ip, #28 @ Cache invalidate all
75 3: movc p0.c5, r10, #11 @ clean D entry
84 movc p0.c5, ip, #10 @ Dcache clean all
122 movc p0.c5, r2, #11 @ Dcache clean line
126 movc p0.c5, ip, #10 @ Dcache clean all
|
| /Linux-v5.4/arch/arm/mm/ |
| D | cache-fa.S | 45 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
68 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
69 mcrne p15, 0, ip, c7, c5, 6 @ invalidate BTB
71 mcrne p15, 0, ip, c7, c5, 4 @ prefetch flush
91 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I line
97 mcrne p15, 0, ip, c7, c5, 6 @ invalidate BTB
99 mcrne p15, 0, ip, c7, c5, 4 @ prefetch flush
128 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
133 mcr p15, 0, r0, c7, c5, 6 @ invalidate BTB
135 mcr p15, 0, r0, c7, c5, 4 @ prefetch flush
[all …]
|
| D | proc-arm946.S | 57 mcr p15, 0, ip, c7, c5, 0 @ flush I cache
83 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
114 mcrne p15, 0, ip, c7, c5, 0 @ flush I cache
138 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
141 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
145 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
148 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
184 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
209 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
328 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
[all …]
|
| D | cache-v4wt.S | 48 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
70 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
91 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
122 1: mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
140 mcr p15, 0, r2, c7, c5, 0 @ invalidate I cache
|
| D | cache-v6.S | 40 mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache
41 mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache
42 mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache
43 mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache
49 mcr p15, 0, r0, c7, c5, 0 @ invalidate I-cache
66 mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate
143 mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate
148 mcr p15, 0, r0, c7, c5, 6 @ invalidate BTB
|
| D | proc-arm940.S | 50 mcr p15, 0, ip, c7, c5, 0 @ flush I cache
76 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
119 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
167 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
275 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
281 mcr p15, 0, r0, c6, c5, 0
287 mcr p15, 0, r0, c6, c5, 1
319 mcr p15, 0, r0, c5, c0, 0 @ all read/write access
320 mcr p15, 0, r0, c5, c0, 1
|
| D | proc-xsc3.S | 149 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
173 mcrne p15, 0, ip, c7, c5, 0 @ invalidate L1 I cache and BTB
175 mcrne p15, 0, ip, c7, c5, 4 @ prefetch flush
196 mcrne p15, 0, r0, c7, c5, 1 @ invalidate L1 I line
202 mcrne p15, 0, ip, c7, c5, 6 @ invalidate BTB
204 mcrne p15, 0, ip, c7, c5, 4 @ prefetch flush
229 mcr p15, 0, r0, c7, c5, 0 @ invalidate L1 I cache and BTB
231 mcr p15, 0, r0, c7, c5, 4 @ prefetch flush
250 mcr p15, 0, r0, c7, c5, 0 @ invalidate L1 I cache and BTB
252 mcr p15, 0, r0, c7, c5, 4 @ prefetch flush
[all …]
|
| D | proc-fa526.S | 108 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
109 mcr p15, 0, ip, c7, c5, 6 @ invalidate BTB since mm changed
111 mcr p15, 0, ip, c7, c5, 4 @ prefetch flush
142 mcr p15, 0, r0, c7, c5, 5 @ invalidate IScratchpad RAM
148 mcr p15, 0, r0, c7, c5, 6 @ invalidate BTB All
150 mcr p15, 0, r0, c7, c5, 4 @ prefetch flush
|
| D | proc-mohawk.S | 92 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
116 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
139 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
142 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
178 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
202 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
318 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
361 mcr p15, 0, ip, c7, c5, 4 @ flush prefetch buffer
|
| D | proc-arm925.S | 143 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
175 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
197 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
200 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
204 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
207 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
242 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
266 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
403 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
|
| D | proc-arm926.S | 109 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
138 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
160 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
163 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
167 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
170 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
205 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
229 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
364 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
|
| D | tlb-v6.S | 48 mcrne p15, 0, r0, c8, c5, 1 @ TLB invalidate I MVA (was 1)
76 mcr p15, 0, r0, c8, c5, 1 @ TLB invalidate I MVA
84 mcr p15, 0, r2, c7, c5, 4 @ prefetch flush (isb)
|
| D | cache-v4wb.S | 59 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
78 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
112 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
170 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
|
| D | proc-xscale.S | 148 mcr p15, 0, r1, c8, c5, 0 @ invalidate I-TLB
191 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
215 mcrne p15, 0, ip, c7, c5, 0 @ Invalidate I cache & BTB
237 mcrne p15, 0, r0, c7, c5, 1 @ Invalidate I cache line
244 mcrne p15, 0, ip, c7, c5, 6 @ Invalidate BTB
268 mcr p15, 0, r0, c7, c5, 0 @ Invalidate I cache & BTB
285 mcr p15, 0, r0, c7, c5, 1 @ Invalidate I cache entry
290 mcr p15, 0, r0, c7, c5, 6 @ Invalidate BTB
311 mcr p15, 0, r0, c7, c5, 0 @ Invalidate I cache & BTB
473 mcr p15, 0, ip, c7, c5, 0 @ Invalidate I cache & BTB
|
| D | proc-arm922.S | 110 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
140 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
162 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
196 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
220 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
355 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
|
| D | tlb-v4wb.S | 38 mcrne p15, 0, r3, c8, c5, 0 @ invalidate I TLB
61 mcr p15, 0, r3, c8, c5, 0 @ invalidate I TLB
|
| D | tlb-v4wbi.S | 40 mcrne p15, 0, r0, c8, c5, 1 @ invalidate I TLB entry
52 1: mcr p15, 0, r0, c8, c5, 1 @ invalidate I TLB entry
|
| D | proc-arm920.S | 108 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
138 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
160 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
194 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
218 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
351 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
|
| D | proc-v6.S | 61 mcr p15, 0, r1, c7, c5, 4 @ ISB
102 mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB
154 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
170 mcr p15, 0, ip, c7, c5, 4 @ ISB
206 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
|
| /Linux-v5.4/arch/arm/include/asm/hardware/ |
| D | cp14.h | 47 #define RCP14_DBGDTRRXint() MRC14(0, c0, c5, 0)
62 #define RCP14_DBGBVR5() MRC14(0, c0, c5, 4)
78 #define RCP14_DBGBCR5() MRC14(0, c0, c5, 5)
94 #define RCP14_DBGWVR5() MRC14(0, c0, c5, 6)
110 #define RCP14_DBGWCR5() MRC14(0, c0, c5, 7)
127 #define RCP14_DBGBXVR5() MRC14(0, c1, c5, 1)
142 #define RCP14_DBGPRSR() MRC14(0, c1, c5, 4)
152 #define WCP14_DBGDTRTXint(val) MCR14(val, 0, c0, c5, 0)
167 #define WCP14_DBGBVR5(val) MCR14(val, 0, c0, c5, 4)
183 #define WCP14_DBGBCR5(val) MCR14(val, 0, c0, c5, 5)
[all …]
|
| /Linux-v5.4/arch/arm/include/asm/ |
| D | kvm_hyp.h | 50 #define DFSR __ACCESS_CP15(c5, 0, c0, 0)
51 #define IFSR __ACCESS_CP15(c5, 0, c0, 1)
52 #define ADFSR __ACCESS_CP15(c5, 0, c1, 0)
53 #define AIFSR __ACCESS_CP15(c5, 0, c1, 1)
54 #define HSR __ACCESS_CP15(c5, 4, c2, 0)
62 #define ICIMVAU __ACCESS_CP15(c7, 0, c5, 1)
|
| D | cp15.h | 68 #define BPIALL __ACCESS_CP15(c7, 0, c5, 6)
69 #define ICIALLU __ACCESS_CP15(c7, 0, c5, 0)
|
| /Linux-v5.4/arch/unicore32/boot/compressed/ |
| D | head.S | 84 movc p0.c5, r0, #28 @ cache invalidate all
140 movc p0.c5, r0, #14 @ flush dcache
142 movc p0.c5, r0, #20 @ icache invalidate all
|
| /Linux-v5.4/tools/testing/selftests/net/ |
| D | route_localnet.sh | 42 ping -c5 -I veth0 127.25.3.14
59 ping -c5 -I veth0 127.25.3.14
|
