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/Linux-v5.4/include/linux/
Dhwmon-sysfs.h19 #define SENSOR_ATTR(_name, _mode, _show, _store, _index) \ argument
20 { .dev_attr = __ATTR(_name, _mode, _show, _store), \
23 #define SENSOR_ATTR_RO(_name, _func, _index) \ argument
24 SENSOR_ATTR(_name, 0444, _func##_show, NULL, _index)
26 #define SENSOR_ATTR_RW(_name, _func, _index) \ argument
27 SENSOR_ATTR(_name, 0644, _func##_show, _func##_store, _index)
29 #define SENSOR_ATTR_WO(_name, _func, _index) \ argument
30 SENSOR_ATTR(_name, 0200, NULL, _func##_store, _index)
32 #define SENSOR_DEVICE_ATTR(_name, _mode, _show, _store, _index) \ argument
33 struct sensor_device_attribute sensor_dev_attr_##_name \
[all …]
Dsysfs.h101 #define __ATTR(_name, _mode, _show, _store) { \ argument
102 .attr = {.name = __stringify(_name), \
108 #define __ATTR_PREALLOC(_name, _mode, _show, _store) { \ argument
109 .attr = {.name = __stringify(_name), \
115 #define __ATTR_RO(_name) { \ argument
116 .attr = { .name = __stringify(_name), .mode = 0444 }, \
117 .show = _name##_show, \
120 #define __ATTR_RO_MODE(_name, _mode) { \ argument
121 .attr = { .name = __stringify(_name), \
123 .show = _name##_show, \
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Dconfigfs.h125 #define CONFIGFS_ATTR(_pfx, _name) \ argument
126 static struct configfs_attribute _pfx##attr_##_name = { \
127 .ca_name = __stringify(_name), \
130 .show = _pfx##_name##_show, \
131 .store = _pfx##_name##_store, \
134 #define CONFIGFS_ATTR_RO(_pfx, _name) \ argument
135 static struct configfs_attribute _pfx##attr_##_name = { \
136 .ca_name = __stringify(_name), \
139 .show = _pfx##_name##_show, \
142 #define CONFIGFS_ATTR_WO(_pfx, _name) \ argument
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Dmdev.h105 #define MDEV_TYPE_ATTR(_name, _mode, _show, _store) \ argument
106 struct mdev_type_attribute mdev_type_attr_##_name = \
107 __ATTR(_name, _mode, _show, _store)
108 #define MDEV_TYPE_ATTR_RW(_name) \ argument
109 struct mdev_type_attribute mdev_type_attr_##_name = __ATTR_RW(_name)
110 #define MDEV_TYPE_ATTR_RO(_name) \ argument
111 struct mdev_type_attribute mdev_type_attr_##_name = __ATTR_RO(_name)
112 #define MDEV_TYPE_ATTR_WO(_name) \ argument
113 struct mdev_type_attribute mdev_type_attr_##_name = __ATTR_WO(_name)
/Linux-v5.4/drivers/staging/rtl8723bs/hal/
Dodm_interface.h18 #define _reg_all(_name) ODM_##_name argument
19 #define _reg_ic(_name, _ic) ODM_##_name##_ic argument
20 #define _bit_all(_name) BIT_##_name argument
21 #define _bit_ic(_name, _ic) BIT_##_name##_ic argument
31 #define _reg_11N(_name) ODM_REG_##_name##_11N argument
32 #define _bit_11N(_name) ODM_BIT_##_name##_11N argument
34 #define _cat(_name, _ic_type, _func) _func##_11N(_name) argument
39 #define ODM_REG(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _reg) argument
40 #define ODM_BIT(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _bit) argument
/Linux-v5.4/include/linux/iio/
Dsysfs.h51 #define IIO_ATTR(_name, _mode, _show, _store, _addr) \ argument
52 { .dev_attr = __ATTR(_name, _mode, _show, _store), \
55 #define IIO_ATTR_RO(_name, _addr) \ argument
56 { .dev_attr = __ATTR_RO(_name), \
59 #define IIO_ATTR_WO(_name, _addr) \ argument
60 { .dev_attr = __ATTR_WO(_name), \
63 #define IIO_ATTR_RW(_name, _addr) \ argument
64 { .dev_attr = __ATTR_RW(_name), \
67 #define IIO_DEVICE_ATTR(_name, _mode, _show, _store, _addr) \ argument
68 struct iio_dev_attr iio_dev_attr_##_name \
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/Linux-v5.4/drivers/thermal/qcom/
Dtsens.h74 #define REG_FIELD_FOR_EACH_SENSOR11(_name, _offset, _startbit, _stopbit) \ argument
75 [_name##_##0] = REG_FIELD(_offset, _startbit, _stopbit), \
76 [_name##_##1] = REG_FIELD(_offset + 4, _startbit, _stopbit), \
77 [_name##_##2] = REG_FIELD(_offset + 8, _startbit, _stopbit), \
78 [_name##_##3] = REG_FIELD(_offset + 12, _startbit, _stopbit), \
79 [_name##_##4] = REG_FIELD(_offset + 16, _startbit, _stopbit), \
80 [_name##_##5] = REG_FIELD(_offset + 20, _startbit, _stopbit), \
81 [_name##_##6] = REG_FIELD(_offset + 24, _startbit, _stopbit), \
82 [_name##_##7] = REG_FIELD(_offset + 28, _startbit, _stopbit), \
83 [_name##_##8] = REG_FIELD(_offset + 32, _startbit, _stopbit), \
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/Linux-v5.4/drivers/platform/x86/
Ddcdbas.h50 #define DCDBAS_DEV_ATTR_RW(_name) \ argument
51 DEVICE_ATTR(_name,0600,_name##_show,_name##_store);
53 #define DCDBAS_DEV_ATTR_RO(_name) \ argument
54 DEVICE_ATTR(_name,0400,_name##_show,NULL);
56 #define DCDBAS_DEV_ATTR_WO(_name) \ argument
57 DEVICE_ATTR(_name,0200,NULL,_name##_store);
59 #define DCDBAS_BIN_ATTR_RW(_name) \ argument
60 struct bin_attribute bin_attr_##_name = { \
61 .attr = { .name = __stringify(_name), \
63 .read = _name##_read, \
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/Linux-v5.4/drivers/regulator/
Dmc13xxx.h55 #define MC13xxx_DEFINE(prefix, _name, _node, _reg, _vsel_reg, _voltages, _ops) \ argument
56 [prefix ## _name] = { \
63 .id = prefix ## _name, \
67 .enable_bit = prefix ## _reg ## _ ## _name ## EN, \
69 .vsel_shift = prefix ## _vsel_reg ## _ ## _name ## VSEL,\
70 .vsel_mask = prefix ## _vsel_reg ## _ ## _name ## VSEL_M,\
73 #define MC13xxx_FIXED_DEFINE(prefix, _name, _node, _reg, _voltages, _ops) \ argument
74 [prefix ## _name] = { \
81 .id = prefix ## _name, \
85 .enable_bit = prefix ## _reg ## _ ## _name ## EN, \
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/Linux-v5.4/drivers/clk/renesas/
Drenesas-cpg-mssr.h44 #define DEF_TYPE(_name, _id, _type...) \ argument
45 { .name = _name, .id = _id, .type = _type }
46 #define DEF_BASE(_name, _id, _type, _parent...) \ argument
47 DEF_TYPE(_name, _id, _type, .parent = _parent)
49 #define DEF_INPUT(_name, _id) \ argument
50 DEF_TYPE(_name, _id, CLK_TYPE_IN)
51 #define DEF_FIXED(_name, _id, _parent, _div, _mult) \ argument
52 DEF_BASE(_name, _id, CLK_TYPE_FF, _parent, .div = _div, .mult = _mult)
53 #define DEF_DIV6P1(_name, _id, _parent, _offset) \ argument
54 DEF_BASE(_name, _id, CLK_TYPE_DIV6P1, _parent, .offset = _offset)
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Drcar-gen3-cpg.h34 #define DEF_GEN3_SD(_name, _id, _parent, _offset) \ argument
35 DEF_BASE(_name, _id, CLK_TYPE_GEN3_SD, _parent, .offset = _offset)
37 #define DEF_GEN3_MDSEL(_name, _id, _md, _parent0, _div0, _parent1, _div1) \ argument
38 DEF_BASE(_name, _id, CLK_TYPE_GEN3_MDSEL, \
42 #define DEF_GEN3_PE(_name, _id, _parent_sscg, _div_sscg, _parent_clean, \ argument
44 DEF_GEN3_MDSEL(_name, _id, 12, _parent_sscg, _div_sscg, \
47 #define DEF_GEN3_OSC(_name, _id, _parent, _div) \ argument
48 DEF_BASE(_name, _id, CLK_TYPE_GEN3_OSC, _parent, .div = _div)
50 #define DEF_GEN3_RCKSEL(_name, _id, _parent0, _div0, _parent1, _div1) \ argument
51 DEF_BASE(_name, _id, CLK_TYPE_GEN3_RCKSEL, \
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/Linux-v5.4/drivers/clk/zte/
Dclk.h37 #define ZX_PLL(_name, _parent, _reg, _table, _pd, _lock) \ argument
44 .hw.init = CLK_HW_INIT(_name, _parent, &zx_pll_ops, \
52 #define ZX296718_PLL(_name, _parent, _reg, _table) \ argument
53 ZX_PLL(_name, _parent, _reg, _table, 0xff, 30)
60 #define GATE(_id, _name, _parent, _reg, _bit, _flag, _gflags) \ argument
67 .hw.init = CLK_HW_INIT(_name, \
80 #define FFACTOR(_id, _name, _parent, _mult, _div, _flag) \ argument
85 .hw.init = CLK_HW_INIT(_name, \
98 #define MUX_F(_id, _name, _parent, _reg, _shift, _width, _flag, _mflag) \ argument
106 .hw.init = CLK_HW_INIT_PARENTS(_name, \
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/Linux-v5.4/drivers/clk/pistachio/
Dclk.h19 #define GATE(_id, _name, _pname, _reg, _shift) \ argument
24 .name = _name, \
39 #define MUX(_id, _name, _pnames, _reg, _shift) \ argument
44 .name = _name, \
59 #define DIV(_id, _name, _pname, _reg, _width) \ argument
65 .name = _name, \
69 #define DIV_F(_id, _name, _pname, _reg, _width, _div_flags) \ argument
75 .name = _name, \
86 #define FIXED_FACTOR(_id, _name, _pname, _div) \ argument
90 .name = _name, \
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/Linux-v5.4/arch/x86/include/asm/
Dpercpu.h571 #define DEFINE_EARLY_PER_CPU(_type, _name, _initvalue) \ argument
572 DEFINE_PER_CPU(_type, _name) = _initvalue; \
573 __typeof__(_type) _name##_early_map[NR_CPUS] __initdata = \
575 __typeof__(_type) *_name##_early_ptr __refdata = _name##_early_map
577 #define DEFINE_EARLY_PER_CPU_READ_MOSTLY(_type, _name, _initvalue) \ argument
578 DEFINE_PER_CPU_READ_MOSTLY(_type, _name) = _initvalue; \
579 __typeof__(_type) _name##_early_map[NR_CPUS] __initdata = \
581 __typeof__(_type) *_name##_early_ptr __refdata = _name##_early_map
583 #define EXPORT_EARLY_PER_CPU_SYMBOL(_name) \ argument
584 EXPORT_PER_CPU_SYMBOL(_name)
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/Linux-v5.4/drivers/clk/mvebu/
Darmada-37xx-periph.c128 #define PERIPH_GATE(_name, _bit) \ argument
129 struct clk_gate gate_##_name = { \
137 #define PERIPH_MUX(_name, _shift) \ argument
138 struct clk_mux mux_##_name = { \
147 #define PERIPH_DOUBLEDIV(_name, _reg1, _reg2, _shift1, _shift2) \ argument
148 struct clk_double_div rate_##_name = { \
158 #define PERIPH_DIV(_name, _reg, _shift, _table) \ argument
159 struct clk_divider rate_##_name = { \
168 #define PERIPH_PM_CPU(_name, _shift1, _reg, _shift2) \ argument
169 struct clk_pm_cpu muxrate_##_name = { \
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/Linux-v5.4/drivers/s390/scsi/
Dzfcp_sysfs.c16 #define ZFCP_DEV_ATTR(_feat, _name, _mode, _show, _store) \ argument
17 struct device_attribute dev_attr_##_feat##_##_name = __ATTR(_name, _mode,\
19 #define ZFCP_DEFINE_ATTR(_feat_def, _feat, _name, _format, _value) \ argument
20 static ssize_t zfcp_sysfs_##_feat##_##_name##_show(struct device *dev, \
28 static ZFCP_DEV_ATTR(_feat, _name, S_IRUGO, \
29 zfcp_sysfs_##_feat##_##_name##_show, NULL);
31 #define ZFCP_DEFINE_ATTR_CONST(_feat, _name, _format, _value) \ argument
32 static ssize_t zfcp_sysfs_##_feat##_##_name##_show(struct device *dev, \
38 static ZFCP_DEV_ATTR(_feat, _name, S_IRUGO, \
39 zfcp_sysfs_##_feat##_##_name##_show, NULL);
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/Linux-v5.4/drivers/clk/mediatek/
Dclk-mtk.h29 #define FIXED_CLK(_id, _name, _parent, _rate) { \ argument
31 .name = _name, \
47 #define FACTOR(_id, _name, _parent, _mult, _div) { \ argument
49 .name = _name, \
81 #define MUX_GATE_FLAGS_2(_id, _name, _parents, _reg, _shift, \ argument
84 .name = _name, \
101 #define MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \ argument
103 MUX_GATE_FLAGS_2(_id, _name, _parents, _reg, \
110 #define MUX_GATE(_id, _name, _parents, _reg, _shift, _width, _gate) \ argument
111 MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \
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Dclk-mt8183-ipu_conn.c44 #define GATE_IPU_CONN(_id, _name, _parent, _shift) \ argument
45 GATE_MTK(_id, _name, _parent, &ipu_conn_cg_regs, _shift, \
48 #define GATE_IPU_CONN_APB(_id, _name, _parent, _shift) \ argument
49 GATE_MTK(_id, _name, _parent, &ipu_conn_apb_cg_regs, _shift, \
52 #define GATE_IPU_CONN_AXI_I(_id, _name, _parent, _shift) \ argument
53 GATE_MTK(_id, _name, _parent, &ipu_conn_axi_cg_regs, _shift, \
56 #define GATE_IPU_CONN_AXI1_I(_id, _name, _parent, _shift) \ argument
57 GATE_MTK(_id, _name, _parent, &ipu_conn_axi1_cg_regs, _shift, \
60 #define GATE_IPU_CONN_AXI2_I(_id, _name, _parent, _shift) \ argument
61 GATE_MTK(_id, _name, _parent, &ipu_conn_axi2_cg_regs, _shift, \
/Linux-v5.4/drivers/clk/meson/
Daxg-audio.c27 #define AUD_GATE(_name, _reg, _bit, _phws, _iflags) \ argument
28 struct clk_regmap aud_##_name = { \
34 .name = "aud_"#_name, \
42 #define AUD_MUX(_name, _reg, _mask, _shift, _dflags, _pdata, _iflags) \ argument
43 struct clk_regmap aud_##_name = { \
51 .name = "aud_"#_name, \
59 #define AUD_DIV(_name, _reg, _shift, _width, _dflags, _phws, _iflags) \ argument
60 struct clk_regmap aud_##_name = { \
68 .name = "aud_"#_name, \
76 #define AUD_PCLK_GATE(_name, _bit) \ argument
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/Linux-v5.4/arch/arm/mach-mmp/
Ddevices.h20 #define PXA168_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...) \ argument
21 struct pxa_device_desc pxa168_device_##_name __initdata = { \
22 .dev_name = "pxa168-" #_name, \
31 #define PXA910_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...) \ argument
32 struct pxa_device_desc pxa910_device_##_name __initdata = { \
33 .dev_name = "pxa910-" #_name, \
42 #define MMP2_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...) \ argument
43 struct pxa_device_desc mmp2_device_##_name __initdata = { \
44 .dev_name = "mmp2-" #_name, \
/Linux-v5.4/drivers/clk/sunxi-ng/
Dccu_gate.h19 #define SUNXI_CCU_GATE(_struct, _name, _parent, _reg, _gate, _flags) \ argument
24 .hw.init = CLK_HW_INIT(_name, \
31 #define SUNXI_CCU_GATE_HW(_struct, _name, _parent, _reg, _gate, _flags) \ argument
36 .hw.init = CLK_HW_INIT_HW(_name, \
43 #define SUNXI_CCU_GATE_FW(_struct, _name, _parent, _reg, _gate, _flags) \ argument
48 .hw.init = CLK_HW_INIT_FW_NAME(_name, \
59 #define SUNXI_CCU_GATE_HWS(_struct, _name, _parent, _reg, _gate, _flags) \ argument
64 .hw.init = CLK_HW_INIT_HWS(_name, \
71 #define SUNXI_CCU_GATE_DATA(_struct, _name, _data, _reg, _gate, _flags) \ argument
77 CLK_HW_INIT_PARENTS_DATA(_name, \
Dccu_div.h87 #define SUNXI_CCU_DIV_TABLE_WITH_GATE(_struct, _name, _parent, _reg, \ argument
96 .hw.init = CLK_HW_INIT(_name, \
104 #define SUNXI_CCU_DIV_TABLE(_struct, _name, _parent, _reg, \ argument
107 SUNXI_CCU_DIV_TABLE_WITH_GATE(_struct, _name, _parent, _reg, \
111 #define SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name, \ argument
123 .hw.init = CLK_HW_INIT_PARENTS(_name, \
130 #define SUNXI_CCU_M_WITH_MUX_GATE(_struct, _name, _parents, _reg, \ argument
133 SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name, \
139 #define SUNXI_CCU_M_WITH_MUX(_struct, _name, _parents, _reg, \ argument
142 SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name, \
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/Linux-v5.4/drivers/pinctrl/mvebu/
Dpinctrl-mvebu.h133 #define MPP_FUNC_CTRL(_idl, _idh, _name, _func) \ argument
135 .name = _name, \
145 #define MPP_FUNC_GPIO_CTRL(_idl, _idh, _name, _func) \ argument
147 .name = _name, \
157 #define _MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \ argument
160 .name = _name, \
167 #define MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \ argument
168 _MPP_VAR_FUNCTION(_val, _name, _subname, _mask)
170 #define MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \ argument
171 _MPP_VAR_FUNCTION(_val, _name, NULL, _mask)
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/Linux-v5.4/drivers/cpuidle/
Dsysfs.c168 #define define_one_ro(_name, show) \ argument
169 static struct cpuidle_attr attr_##_name = __ATTR(_name, 0444, show, NULL)
170 #define define_one_rw(_name, show, store) \ argument
171 static struct cpuidle_attr attr_##_name = __ATTR(_name, 0644, show, store)
245 #define define_one_state_ro(_name, show) \ argument
246 static struct cpuidle_state_attr attr_##_name = __ATTR(_name, 0444, show, NULL)
248 #define define_one_state_rw(_name, show, store) \ argument
249 static struct cpuidle_state_attr attr_##_name = __ATTR(_name, 0644, show, store)
251 #define define_show_state_function(_name) \ argument
252 static ssize_t show_state_##_name(struct cpuidle_state *state, \
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/Linux-v5.4/arch/x86/events/
Dprobe.h16 #define __PMU_EVENT_GROUP(_name) \ argument
17 static struct attribute *attrs_##_name[] = { \
18 &attr_##_name.attr.attr, \
22 #define PMU_EVENT_GROUP(_grp, _name) \ argument
23 __PMU_EVENT_GROUP(_name); \
24 static struct attribute_group group_##_name = { \
26 .attrs = attrs_##_name, \

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