Searched refs:__u32 (Results 1 – 25 of 1789) sorted by relevance
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64 #define SND_AUDIOCODEC_PCM ((__u32) 0x00000001)65 #define SND_AUDIOCODEC_MP3 ((__u32) 0x00000002)66 #define SND_AUDIOCODEC_AMR ((__u32) 0x00000003)67 #define SND_AUDIOCODEC_AMRWB ((__u32) 0x00000004)68 #define SND_AUDIOCODEC_AMRWBPLUS ((__u32) 0x00000005)69 #define SND_AUDIOCODEC_AAC ((__u32) 0x00000006)70 #define SND_AUDIOCODEC_WMA ((__u32) 0x00000007)71 #define SND_AUDIOCODEC_REAL ((__u32) 0x00000008)72 #define SND_AUDIOCODEC_VORBIS ((__u32) 0x00000009)73 #define SND_AUDIOCODEC_FLAC ((__u32) 0x0000000A)[all …]
121 __u32 event_type; /* enum ib_event_type */122 __u32 reserved;132 __u32 reserved;147 __u32 command;156 __u32 cmd_hdr_reserved;165 __u32 async_fd;166 __u32 num_comp_vectors;181 __u32 vendor_id;182 __u32 vendor_part_id;183 __u32 hw_ver;[all …]
75 __u32 total_num_bfregs;76 __u32 num_low_latency_bfregs;87 __u32 total_num_bfregs;88 __u32 num_low_latency_bfregs;89 __u32 flags;90 __u32 comp_mask;94 __u32 reserved2;128 __u32 qp_tab_size;129 __u32 bf_reg_size;130 __u32 tot_bfregs;[all …]
54 __u32 dev_id;55 __u32 wqe_size;56 __u32 max_inline_data;57 __u32 dpp_wqe_size;59 __u32 ah_tbl_len;60 __u32 rqe_size;68 __u32 rsvd[2];72 __u32 id;73 __u32 dpp_enabled;74 __u32 dpp_page_addr_hi;[all …]
131 __u32 vals[IPU3_UAPI_AE_BINS * IPU3_UAPI_AE_COLORS];196 __u32 cell0:4;197 __u32 cell1:4;198 __u32 cell2:4;199 __u32 cell3:4;200 __u32 cell4:4;201 __u32 cell5:4;202 __u32 cell6:4;203 __u32 cell7:4;333 __u32 y1_sign_vec;[all …]
36 __u32 smt_op_version_id;37 __u32 smt_hi_version_id;38 __u32 smt_lo_version_id;40 __u32 smt_mib_version_id;41 __u32 smt_mac_cts;42 __u32 smt_non_master_cts;43 __u32 smt_master_cts;44 __u32 smt_available_paths;45 __u32 smt_config_capabilities;46 __u32 smt_config_policy;[all …]
75 __u32 prefixlen; /* up to 32 for AF_INET, 128 for AF_INET6 */81 __u32 attach_type; /* program attach type */371 __u32 map_type; /* one of enum bpf_map_type */372 __u32 key_size; /* size of key in bytes */373 __u32 value_size; /* size of value in bytes */374 __u32 max_entries; /* max number of entries in a map */375 __u32 map_flags; /* BPF_MAP_CREATE related378 __u32 inner_map_fd; /* fd pointing to the inner map */379 __u32 numa_node; /* numa node (effective only if383 __u32 map_ifindex; /* ifindex of netdev to create on */[all …]
162 __u32 fpga_id; /* FPGA Identification Register */163 __u32 fpga_version; /* FPGA Version Number Register */164 __u32 cpu_start; /* CPU start Register (write) */165 __u32 cpu_stop; /* CPU stop Register (write) */166 __u32 misc_reg; /* Miscellaneous Register */167 __u32 idt_mode; /* IDT mode Register */168 __u32 uart_irq_status; /* UART IRQ status Register */169 __u32 clear_timer0_irq; /* Clear timer interrupt Register */170 __u32 clear_timer1_irq; /* Clear timer interrupt Register */171 __u32 clear_timer2_irq; /* Clear timer interrupt Register */[all …]
63 __u32 type;87 __u32 type;88 __u32 node_id;89 __u32 local_node_id;90 __u32 bm_node_id;91 __u32 irm_node_id;92 __u32 root_node_id;93 __u32 generation;118 __u32 type;119 __u32 rcode;[all …]
36 __u32 packets; /* Number of enqueued packets */37 __u32 drops; /* Packets dropped because of lack of resources */38 __u32 overlimits; /* Number of throttle events when this40 __u32 bps; /* Current flow byte rate */41 __u32 pps; /* Current flow packet rate */42 __u32 qlen;43 __u32 backlog;97 __u32 rate;125 __u32 limit; /* Queue length: bytes for bfifo, packets for pfifo */140 __u32 limit; /* Queue length in packets. */[all …]
33 __u32 major_version; /* from KFD */34 __u32 minor_version; /* from KFD */52 __u32 ring_size; /* to KFD */53 __u32 gpu_id; /* to KFD */54 __u32 queue_type; /* to KFD */55 __u32 queue_percentage; /* to KFD */56 __u32 queue_priority; /* to KFD */57 __u32 queue_id; /* from KFD */62 __u32 ctx_save_restore_size; /* to KFD */63 __u32 ctl_stack_size; /* to KFD */[all …]
97 __u32 cmd;98 __u32 supported;99 __u32 advertising;107 __u32 maxtxpkt;108 __u32 maxrxpkt;112 __u32 lp_advertising;113 __u32 reserved[2];117 __u32 speed) in ethtool_cmd_speed_set()123 static inline __u32 ethtool_cmd_speed(const struct ethtool_cmd *ep) in ethtool_cmd_speed()178 __u32 cmd;[all …]
78 __u32 next; /* Offset of next capability */137 __u32 argsz;138 __u32 flags;196 __u32 argsz;197 __u32 flags;204 __u32 num_regions; /* Max region index + 1 */205 __u32 num_irqs; /* Max IRQ index + 1 */234 __u32 argsz;235 __u32 flags;240 __u32 index; /* Region index */[all …]
82 ((__u32)(a) | ((__u32)(b) << 8) | ((__u32)(c) << 16) | ((__u32)(d) << 24))416 __u32 width;417 __u32 height;421 __u32 numerator;422 __u32 denominator;440 __u32 version;441 __u32 capabilities;442 __u32 device_caps;443 __u32 reserved[3];491 __u32 width;[all …]
35 __u32 packets; /* Number of enqueued packets */36 __u32 drops; /* Packets dropped because of lack of resources */37 __u32 overlimits; /* Number of throttle events when this39 __u32 bps; /* Current flow byte rate */40 __u32 pps; /* Current flow packet rate */41 __u32 qlen;42 __u32 backlog;96 __u32 rate;124 __u32 limit; /* Queue length: bytes for bfifo, packets for pfifo */139 __u32 limit; /* Queue length in packets. */[all …]
222 __u32 clock;234 __u32 vrefresh;236 __u32 flags;237 __u32 type;246 __u32 count_fbs;247 __u32 count_crtcs;248 __u32 count_connectors;249 __u32 count_encoders;250 __u32 min_width;251 __u32 max_width;[all …]
149 __u32 handle;150 __u32 _pad;167 __u32 operation;169 __u32 list_handle;171 __u32 bo_number;173 __u32 bo_info_size;180 __u32 bo_handle;182 __u32 bo_priority;187 __u32 list_handle;188 __u32 _pad;[all …]
126 __u32 param;127 __u32 pad64;149 __u32 pad64;191 __u32 flags;192 __u32 format;193 __u32 mip_levels[DRM_VMW_MAX_SURFACE_FACES];227 __u32 width;228 __u32 height;229 __u32 depth;230 __u32 pad64;[all …]
57 __u32 flags;65 __u32 handle;77 __u32 handle;84 __u32 pad;104 __u32 id;112 __u32 value;124 __u32 id;131 __u32 pad;143 __u32 id;150 __u32 thresh;[all …]
36 __u32 flags;37 __u32 handle;48 __u32 handle;49 __u32 reserved;63 __u32 handle;64 __u32 flags;77 __u32 connection;78 __u32 extensions;99 __u32 major;100 __u32 minor;[all …]
66 __u32 hindex; /* Handle index, or ~0 if not present. */67 __u32 offset; /* Offset to start of buffer. */130 __u32 bin_cl_size;132 __u32 shader_rec_size;139 __u32 shader_rec_count;141 __u32 uniforms_size;144 __u32 bo_handle_count;159 __u32 clear_color[2];160 __u32 clear_z;163 __u32 pad:24;[all …]
79 __u32 bcl_start;82 __u32 bcl_end;95 __u32 rcl_start;98 __u32 rcl_end;101 __u32 in_sync_bcl;103 __u32 in_sync_rcl;105 __u32 out_sync;112 __u32 qma;115 __u32 qms;118 __u32 qts;[all …]
15 __u32 v : 1;16 __u32 s : 1;17 __u32 k : 1;18 __u32 h : 1;19 __u32 a : 1;20 __u32 reserved1 : 3;21 __u32 ps : 1;22 __u32 qs : 1;23 __u32 pc : 1;24 __u32 qc : 1;[all …]
113 __u32 sram_size;114 __u32 num_of_events;115 __u32 device_id; /* PCI Device ID */116 __u32 reserved[3];117 __u32 armcp_cpld_version;118 __u32 psoc_pci_pll_nr;119 __u32 psoc_pci_pll_nf;120 __u32 psoc_pci_pll_od;121 __u32 psoc_pci_pll_div_factor;134 __u32 is_idle;[all …]
