Searched refs:__offset_DMA (Results 1 – 1 of 1) sorted by relevance
447 static inline uint32_t __offset_DMA(enum mdp4_dma idx) in __offset_DMA() function456 static inline uint32_t REG_MDP4_DMA(enum mdp4_dma i0) { return 0x00000000 + __offset_DMA(i0); } in REG_MDP4_DMA()458 static inline uint32_t REG_MDP4_DMA_CONFIG(enum mdp4_dma i0) { return 0x00000000 + __offset_DMA(i0)… in REG_MDP4_DMA_CONFIG()487 static inline uint32_t REG_MDP4_DMA_SRC_SIZE(enum mdp4_dma i0) { return 0x00000004 + __offset_DMA(i… in REG_MDP4_DMA_SRC_SIZE()501 static inline uint32_t REG_MDP4_DMA_SRC_BASE(enum mdp4_dma i0) { return 0x00000008 + __offset_DMA(i… in REG_MDP4_DMA_SRC_BASE()503 static inline uint32_t REG_MDP4_DMA_SRC_STRIDE(enum mdp4_dma i0) { return 0x0000000c + __offset_DMA… in REG_MDP4_DMA_SRC_STRIDE()505 static inline uint32_t REG_MDP4_DMA_DST_SIZE(enum mdp4_dma i0) { return 0x00000010 + __offset_DMA(i… in REG_MDP4_DMA_DST_SIZE()519 …nline uint32_t REG_MDP4_DMA_CURSOR_SIZE(enum mdp4_dma i0) { return 0x00000044 + __offset_DMA(i0); } in REG_MDP4_DMA_CURSOR_SIZE()533 …nline uint32_t REG_MDP4_DMA_CURSOR_BASE(enum mdp4_dma i0) { return 0x00000048 + __offset_DMA(i0); } in REG_MDP4_DMA_CURSOR_BASE()535 static inline uint32_t REG_MDP4_DMA_CURSOR_POS(enum mdp4_dma i0) { return 0x0000004c + __offset_DMA… in REG_MDP4_DMA_CURSOR_POS()[all …]
