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Searched refs:_MASKED_BIT_DISABLE (Results 1 – 11 of 11) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/i915/gt/
Dintel_ringbuffer.c723 RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING)); in xcs_resume()
901 _MASKED_BIT_DISABLE(CM0_STC_EVICT_DISABLE_LRA_SNB)); in rcs_resume()
1672 *cs++ = _MASKED_BIT_DISABLE( in mi_set_context()
2038 _MASKED_BIT_DISABLE(GEN6_BSD_SLEEP_MSG_DISABLE)); in gen6_bsd_submit_request()
Dintel_lrc.c2323 ENGINE_WRITE_FW(engine, RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING)); in enable_execlists()
3201 _MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT) | in execlists_init_reg_state()
3205 _MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT | in execlists_init_reg_state()
Dintel_reset.c485 _MASKED_BIT_DISABLE(RESET_CTL_REQUEST_RESET)); in gen8_engine_reset_cancel()
Dintel_workarounds.c184 wa_write_masked_or(wal, (addr), (mask), _MASKED_BIT_DISABLE(mask))
Dintel_engine_cs.c887 ENGINE_WRITE_FW(engine, RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING)); in intel_engine_cancel_stop_cs()
/Linux-v5.4/drivers/gpu/drm/i915/
Dintel_pm.c395 _MASKED_BIT_DISABLE(FW_BLC_SELF_EN); in _intel_set_memory_cxsr()
406 _MASKED_BIT_DISABLE(INSTPM_SELF_EN); in _intel_set_memory_cxsr()
8970 I915_WRITE(CACHE_MODE_0, _MASKED_BIT_DISABLE(RC_OP_FLUSH_ENABLE)); in ilk_init_clock_gating()
9038 I915_WRITE(CACHE_MODE_0, _MASKED_BIT_DISABLE(RC_OP_FLUSH_ENABLE)); in gen6_init_clock_gating()
9052 _MASKED_BIT_DISABLE(CM0_STC_EVICT_DISABLE_LRA_SNB)); in gen6_init_clock_gating()
9354 I915_WRITE(CACHE_MODE_0_GEN7, _MASKED_BIT_DISABLE(RC_OP_FLUSH_ENABLE)); in hsw_init_clock_gating()
9358 _MASKED_BIT_DISABLE(HIZ_RAW_STALL_OPT_DISABLE)); in hsw_init_clock_gating()
9406 I915_WRITE(CACHE_MODE_0_GEN7, _MASKED_BIT_DISABLE(RC_OP_FLUSH_ENABLE)); in ivb_init_clock_gating()
9451 _MASKED_BIT_DISABLE(HIZ_RAW_STALL_OPT_DISABLE)); in ivb_init_clock_gating()
9498 I915_WRITE(CACHE_MODE_0_GEN7, _MASKED_BIT_DISABLE(RC_OP_FLUSH_ENABLE)); in vlv_init_clock_gating()
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Dintel_uncore.c90 #define fw_clear(d, val) writel(_MASKED_BIT_DISABLE((val)), (d)->reg_set)
Di915_reg.h273 #define _MASKED_BIT_DISABLE(a) (_MASKED_FIELD((a), 0)) macro
/Linux-v5.4/drivers/gpu/drm/i915/gt/uc/
Dintel_uc_fw.c483 intel_uncore_write_fw(uncore, DMA_CTRL, _MASKED_BIT_DISABLE(dma_flags)); in uc_fw_xfer()
Dintel_guc_submission.c1064 irqs |= _MASKED_BIT_DISABLE(GFX_INTERRUPT_STEERING); in guc_interrupts_release()
/Linux-v5.4/drivers/gpu/drm/i915/gvt/
Dhandlers.c1725 || (data & _MASKED_BIT_DISABLE(GFX_RUN_LIST_ENABLE))) { in ring_mode_mmio_write()
1788 else if (data & _MASKED_BIT_DISABLE(RESET_CTL_REQUEST_RESET)) in ring_reset_ctl_write()