Searched refs:XUSB_PADCTL_SS_PORT_MAP_PORTX_INTERNAL (Results 1 – 2 of 2) sorted by relevance
39 #define XUSB_PADCTL_SS_PORT_MAP_PORTX_INTERNAL(x) (1 << (((x) * 4) + 3)) macro1483 value &= ~XUSB_PADCTL_SS_PORT_MAP_PORTX_INTERNAL(index); in tegra124_usb3_port_enable()1485 value |= XUSB_PADCTL_SS_PORT_MAP_PORTX_INTERNAL(index); in tegra124_usb3_port_enable()
46 #define XUSB_PADCTL_SS_PORT_MAP_PORTX_INTERNAL(x) (1 << (((x) * 5) + 4)) macro1815 value &= ~XUSB_PADCTL_SS_PORT_MAP_PORTX_INTERNAL(index); in tegra210_usb3_port_enable()1817 value |= XUSB_PADCTL_SS_PORT_MAP_PORTX_INTERNAL(index); in tegra210_usb3_port_enable()