Searched refs:XGMAC_RX_CONFIG (Results 1 – 3 of 3) sorted by relevance
21 rx = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_core_init()45 writel(rx, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_core_init()52 u32 rx = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_set_mac()63 writel(rx, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_set_mac()71 value = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_rx_ipc()76 writel(value, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_rx_ipc()78 return !!(readl(ioaddr + XGMAC_RX_CONFIG) & XGMAC_CONFIG_IPC); in dwxgmac2_rx_ipc()328 u32 cfg = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_pmt()330 writel(cfg, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_pmt()498 u32 value = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_set_mac_loopback()[all …]
302 value = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_dma_start_rx()304 writel(value, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_dma_start_rx()498 u32 value = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_enable_sph()502 writel(value, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_enable_sph()
31 #define XGMAC_RX_CONFIG 0x00000004 macro
