Searched refs:X86_CONFIG (Results 1 – 3 of 3) sorted by relevance
| /Linux-v5.4/arch/x86/kernel/cpu/resctrl/ |
| D | pseudo_lock.c | 1063 perf_miss_attr.config = X86_CONFIG(.event = 0xd1, in measure_l2_residency()
1065 perf_hit_attr.config = X86_CONFIG(.event = 0xd1, in measure_l2_residency()
1102 perf_hit_attr.config = X86_CONFIG(.event = 0x2e, in measure_l3_residency()
1104 perf_miss_attr.config = X86_CONFIG(.event = 0x2e, in measure_l3_residency()
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| /Linux-v5.4/arch/x86/events/intel/ |
| D | core.c | 3137 u64 alt_config = X86_CONFIG(.event=0xc0, .inv=1, .cmask=16); in intel_pebs_aliases_core2()
3165 u64 alt_config = X86_CONFIG(.event=0xc2, .umask=0x01, .inv=1, .cmask=16); in intel_pebs_aliases_snb()
3189 u64 alt_config = X86_CONFIG(.event=0xc0, .umask=0x01, .inv=1, .cmask=16); in intel_pebs_aliases_precdist()
3575 X86_CONFIG(.event=0xc0, .umask=0x01)) { in bdw_limit_period()
4638 X86_CONFIG(.event=0x0e, .umask=0x01, .inv=1, .cmask=1); in intel_pmu_init()
4641 X86_CONFIG(.event=0xb1, .umask=0x3f, .inv=1, .cmask=1); in intel_pmu_init()
4794 X86_CONFIG(.event=0x0e, .umask=0x01, .inv=1, .cmask=1); in intel_pmu_init()
4797 X86_CONFIG(.event=0xb1, .umask=0x3f, .inv=1, .cmask=1); in intel_pmu_init()
4834 X86_CONFIG(.event=0x0e, .umask=0x01, .inv=1, .cmask=1); in intel_pmu_init()
4837 X86_CONFIG(.event=0xb1, .umask=0x01, .inv=1, .cmask=1); in intel_pmu_init()
[all …]
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| /Linux-v5.4/arch/x86/events/ |
| D | perf_event.h | 553 #define X86_CONFIG(args...) ((union x86_pmu_config){.bits = {args}}).value macro
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