Searched refs:WR_CONFIRM (Results 1 – 10 of 10) sorted by relevance
98 #define WR_CONFIRM (1 << 20) macro
119 #define WR_CONFIRM (1 << 20) macro
153 #define WR_CONFIRM (1 << 20) macro
271 #define WR_CONFIRM (1 << 20) macro
811 (wc ? WR_CONFIRM : 0)); in gfx_v9_0_write_data_to_reg()899 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v9_0_ring_test_ib()5282 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v9_0_ring_emit_fence_kiq()5291 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v9_0_ring_emit_fence_kiq()5316 WR_CONFIRM) | in gfx_v9_0_ring_emit_ce_meta()5338 WR_CONFIRM) | in gfx_v9_0_ring_emit_de_meta()5433 cmd = WRITE_DATA_ENGINE_SEL(1) | WR_CONFIRM; in gfx_v9_0_ring_emit_wreg()5439 cmd = WR_CONFIRM; in gfx_v9_0_ring_emit_wreg()
405 WRITE_DATA_DST_SEL(0) | (wc ? WR_CONFIRM : 0)); in gfx_v10_0_write_data_to_reg()4556 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v10_0_ring_emit_fence_kiq()4565 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v10_0_ring_emit_fence_kiq()4693 WR_CONFIRM) | in gfx_v10_0_ring_emit_ce_meta()4727 WR_CONFIRM) | in gfx_v10_0_ring_emit_de_meta()4773 cmd = WRITE_DATA_ENGINE_SEL(1) | WR_CONFIRM; in gfx_v10_0_ring_emit_wreg()4779 cmd = WR_CONFIRM; in gfx_v10_0_ring_emit_wreg()
896 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v8_0_ring_test_ib()6387 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v8_0_ring_emit_fence_kiq()6396 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v8_0_ring_emit_fence_kiq()6492 cmd = WRITE_DATA_ENGINE_SEL(1) | WR_CONFIRM; in gfx_v8_0_ring_emit_wreg()6498 cmd = WR_CONFIRM; in gfx_v8_0_ring_emit_wreg()7208 WR_CONFIRM) | in gfx_v8_0_ring_emit_ce_meta()7241 WR_CONFIRM) | in gfx_v8_0_ring_emit_de_meta()
1709 #define WR_CONFIRM (1 << 20) macro
1646 #define WR_CONFIRM (1 << 20) macro
1737 #define WR_CONFIRM (1 << 20) macro
