1  /* SPDX-License-Identifier: GPL-2.0-only */
2  /*
3   * ALSA SoC WM9090 driver
4   *
5   * Copyright 2009 Wolfson Microelectronics
6   *
7   * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8   */
9  
10  #ifndef __WM9090_H
11  #define __WM9090_H
12  
13  /*
14   * Register values.
15   */
16  #define WM9090_SOFTWARE_RESET                   0x00
17  #define WM9090_POWER_MANAGEMENT_1               0x01
18  #define WM9090_POWER_MANAGEMENT_2               0x02
19  #define WM9090_POWER_MANAGEMENT_3               0x03
20  #define WM9090_CLOCKING_1                       0x06
21  #define WM9090_IN1_LINE_CONTROL                 0x16
22  #define WM9090_IN2_LINE_CONTROL                 0x17
23  #define WM9090_IN1_LINE_INPUT_A_VOLUME          0x18
24  #define WM9090_IN1_LINE_INPUT_B_VOLUME          0x19
25  #define WM9090_IN2_LINE_INPUT_A_VOLUME          0x1A
26  #define WM9090_IN2_LINE_INPUT_B_VOLUME          0x1B
27  #define WM9090_LEFT_OUTPUT_VOLUME               0x1C
28  #define WM9090_RIGHT_OUTPUT_VOLUME              0x1D
29  #define WM9090_SPKMIXL_ATTENUATION              0x22
30  #define WM9090_SPKOUT_MIXERS                    0x24
31  #define WM9090_CLASSD3                          0x25
32  #define WM9090_SPEAKER_VOLUME_LEFT              0x26
33  #define WM9090_OUTPUT_MIXER1                    0x2D
34  #define WM9090_OUTPUT_MIXER2                    0x2E
35  #define WM9090_OUTPUT_MIXER3                    0x2F
36  #define WM9090_OUTPUT_MIXER4                    0x30
37  #define WM9090_SPEAKER_MIXER                    0x36
38  #define WM9090_ANTIPOP2                         0x39
39  #define WM9090_WRITE_SEQUENCER_0                0x46
40  #define WM9090_WRITE_SEQUENCER_1                0x47
41  #define WM9090_WRITE_SEQUENCER_2                0x48
42  #define WM9090_WRITE_SEQUENCER_3                0x49
43  #define WM9090_WRITE_SEQUENCER_4                0x4A
44  #define WM9090_WRITE_SEQUENCER_5                0x4B
45  #define WM9090_CHARGE_PUMP_1                    0x4C
46  #define WM9090_DC_SERVO_0                       0x54
47  #define WM9090_DC_SERVO_1                       0x55
48  #define WM9090_DC_SERVO_3                       0x57
49  #define WM9090_DC_SERVO_READBACK_0              0x58
50  #define WM9090_DC_SERVO_READBACK_1              0x59
51  #define WM9090_DC_SERVO_READBACK_2              0x5A
52  #define WM9090_ANALOGUE_HP_0                    0x60
53  #define WM9090_AGC_CONTROL_0                    0x62
54  #define WM9090_AGC_CONTROL_1                    0x63
55  #define WM9090_AGC_CONTROL_2                    0x64
56  
57  #define WM9090_REGISTER_COUNT                   40
58  #define WM9090_MAX_REGISTER                     0x64
59  
60  /*
61   * Field Definitions.
62   */
63  
64  /*
65   * R0 (0x00) - Software Reset
66   */
67  #define WM9090_SW_RESET_MASK                    0xFFFF  /* SW_RESET - [15:0] */
68  #define WM9090_SW_RESET_SHIFT                        0  /* SW_RESET - [15:0] */
69  #define WM9090_SW_RESET_WIDTH                       16  /* SW_RESET - [15:0] */
70  
71  /*
72   * R1 (0x01) - Power Management (1)
73   */
74  #define WM9090_SPKOUTL_ENA                      0x1000  /* SPKOUTL_ENA */
75  #define WM9090_SPKOUTL_ENA_MASK                 0x1000  /* SPKOUTL_ENA */
76  #define WM9090_SPKOUTL_ENA_SHIFT                    12  /* SPKOUTL_ENA */
77  #define WM9090_SPKOUTL_ENA_WIDTH                     1  /* SPKOUTL_ENA */
78  #define WM9090_HPOUT1L_ENA                      0x0200  /* HPOUT1L_ENA */
79  #define WM9090_HPOUT1L_ENA_MASK                 0x0200  /* HPOUT1L_ENA */
80  #define WM9090_HPOUT1L_ENA_SHIFT                     9  /* HPOUT1L_ENA */
81  #define WM9090_HPOUT1L_ENA_WIDTH                     1  /* HPOUT1L_ENA */
82  #define WM9090_HPOUT1R_ENA                      0x0100  /* HPOUT1R_ENA */
83  #define WM9090_HPOUT1R_ENA_MASK                 0x0100  /* HPOUT1R_ENA */
84  #define WM9090_HPOUT1R_ENA_SHIFT                     8  /* HPOUT1R_ENA */
85  #define WM9090_HPOUT1R_ENA_WIDTH                     1  /* HPOUT1R_ENA */
86  #define WM9090_OSC_ENA                          0x0008  /* OSC_ENA */
87  #define WM9090_OSC_ENA_MASK                     0x0008  /* OSC_ENA */
88  #define WM9090_OSC_ENA_SHIFT                         3  /* OSC_ENA */
89  #define WM9090_OSC_ENA_WIDTH                         1  /* OSC_ENA */
90  #define WM9090_VMID_RES_MASK                    0x0006  /* VMID_RES - [2:1] */
91  #define WM9090_VMID_RES_SHIFT                        1  /* VMID_RES - [2:1] */
92  #define WM9090_VMID_RES_WIDTH                        2  /* VMID_RES - [2:1] */
93  #define WM9090_BIAS_ENA                         0x0001  /* BIAS_ENA */
94  #define WM9090_BIAS_ENA_MASK                    0x0001  /* BIAS_ENA */
95  #define WM9090_BIAS_ENA_SHIFT                        0  /* BIAS_ENA */
96  #define WM9090_BIAS_ENA_WIDTH                        1  /* BIAS_ENA */
97  
98  /*
99   * R2 (0x02) - Power Management (2)
100   */
101  #define WM9090_TSHUT                            0x8000  /* TSHUT */
102  #define WM9090_TSHUT_MASK                       0x8000  /* TSHUT */
103  #define WM9090_TSHUT_SHIFT                          15  /* TSHUT */
104  #define WM9090_TSHUT_WIDTH                           1  /* TSHUT */
105  #define WM9090_TSHUT_ENA                        0x4000  /* TSHUT_ENA */
106  #define WM9090_TSHUT_ENA_MASK                   0x4000  /* TSHUT_ENA */
107  #define WM9090_TSHUT_ENA_SHIFT                      14  /* TSHUT_ENA */
108  #define WM9090_TSHUT_ENA_WIDTH                       1  /* TSHUT_ENA */
109  #define WM9090_TSHUT_OPDIS                      0x2000  /* TSHUT_OPDIS */
110  #define WM9090_TSHUT_OPDIS_MASK                 0x2000  /* TSHUT_OPDIS */
111  #define WM9090_TSHUT_OPDIS_SHIFT                    13  /* TSHUT_OPDIS */
112  #define WM9090_TSHUT_OPDIS_WIDTH                     1  /* TSHUT_OPDIS */
113  #define WM9090_IN1A_ENA                         0x0080  /* IN1A_ENA */
114  #define WM9090_IN1A_ENA_MASK                    0x0080  /* IN1A_ENA */
115  #define WM9090_IN1A_ENA_SHIFT                        7  /* IN1A_ENA */
116  #define WM9090_IN1A_ENA_WIDTH                        1  /* IN1A_ENA */
117  #define WM9090_IN1B_ENA                         0x0040  /* IN1B_ENA */
118  #define WM9090_IN1B_ENA_MASK                    0x0040  /* IN1B_ENA */
119  #define WM9090_IN1B_ENA_SHIFT                        6  /* IN1B_ENA */
120  #define WM9090_IN1B_ENA_WIDTH                        1  /* IN1B_ENA */
121  #define WM9090_IN2A_ENA                         0x0020  /* IN2A_ENA */
122  #define WM9090_IN2A_ENA_MASK                    0x0020  /* IN2A_ENA */
123  #define WM9090_IN2A_ENA_SHIFT                        5  /* IN2A_ENA */
124  #define WM9090_IN2A_ENA_WIDTH                        1  /* IN2A_ENA */
125  #define WM9090_IN2B_ENA                         0x0010  /* IN2B_ENA */
126  #define WM9090_IN2B_ENA_MASK                    0x0010  /* IN2B_ENA */
127  #define WM9090_IN2B_ENA_SHIFT                        4  /* IN2B_ENA */
128  #define WM9090_IN2B_ENA_WIDTH                        1  /* IN2B_ENA */
129  
130  /*
131   * R3 (0x03) - Power Management (3)
132   */
133  #define WM9090_AGC_ENA                          0x4000  /* AGC_ENA */
134  #define WM9090_AGC_ENA_MASK                     0x4000  /* AGC_ENA */
135  #define WM9090_AGC_ENA_SHIFT                        14  /* AGC_ENA */
136  #define WM9090_AGC_ENA_WIDTH                         1  /* AGC_ENA */
137  #define WM9090_SPKLVOL_ENA                      0x0100  /* SPKLVOL_ENA */
138  #define WM9090_SPKLVOL_ENA_MASK                 0x0100  /* SPKLVOL_ENA */
139  #define WM9090_SPKLVOL_ENA_SHIFT                     8  /* SPKLVOL_ENA */
140  #define WM9090_SPKLVOL_ENA_WIDTH                     1  /* SPKLVOL_ENA */
141  #define WM9090_MIXOUTL_ENA                      0x0020  /* MIXOUTL_ENA */
142  #define WM9090_MIXOUTL_ENA_MASK                 0x0020  /* MIXOUTL_ENA */
143  #define WM9090_MIXOUTL_ENA_SHIFT                     5  /* MIXOUTL_ENA */
144  #define WM9090_MIXOUTL_ENA_WIDTH                     1  /* MIXOUTL_ENA */
145  #define WM9090_MIXOUTR_ENA                      0x0010  /* MIXOUTR_ENA */
146  #define WM9090_MIXOUTR_ENA_MASK                 0x0010  /* MIXOUTR_ENA */
147  #define WM9090_MIXOUTR_ENA_SHIFT                     4  /* MIXOUTR_ENA */
148  #define WM9090_MIXOUTR_ENA_WIDTH                     1  /* MIXOUTR_ENA */
149  #define WM9090_SPKMIX_ENA                       0x0008  /* SPKMIX_ENA */
150  #define WM9090_SPKMIX_ENA_MASK                  0x0008  /* SPKMIX_ENA */
151  #define WM9090_SPKMIX_ENA_SHIFT                      3  /* SPKMIX_ENA */
152  #define WM9090_SPKMIX_ENA_WIDTH                      1  /* SPKMIX_ENA */
153  
154  /*
155   * R6 (0x06) - Clocking 1
156   */
157  #define WM9090_TOCLK_RATE                       0x8000  /* TOCLK_RATE */
158  #define WM9090_TOCLK_RATE_MASK                  0x8000  /* TOCLK_RATE */
159  #define WM9090_TOCLK_RATE_SHIFT                     15  /* TOCLK_RATE */
160  #define WM9090_TOCLK_RATE_WIDTH                      1  /* TOCLK_RATE */
161  #define WM9090_TOCLK_ENA                        0x4000  /* TOCLK_ENA */
162  #define WM9090_TOCLK_ENA_MASK                   0x4000  /* TOCLK_ENA */
163  #define WM9090_TOCLK_ENA_SHIFT                      14  /* TOCLK_ENA */
164  #define WM9090_TOCLK_ENA_WIDTH                       1  /* TOCLK_ENA */
165  
166  /*
167   * R22 (0x16) - IN1 Line Control
168   */
169  #define WM9090_IN1_DIFF                         0x0002  /* IN1_DIFF */
170  #define WM9090_IN1_DIFF_MASK                    0x0002  /* IN1_DIFF */
171  #define WM9090_IN1_DIFF_SHIFT                        1  /* IN1_DIFF */
172  #define WM9090_IN1_DIFF_WIDTH                        1  /* IN1_DIFF */
173  #define WM9090_IN1_CLAMP                        0x0001  /* IN1_CLAMP */
174  #define WM9090_IN1_CLAMP_MASK                   0x0001  /* IN1_CLAMP */
175  #define WM9090_IN1_CLAMP_SHIFT                       0  /* IN1_CLAMP */
176  #define WM9090_IN1_CLAMP_WIDTH                       1  /* IN1_CLAMP */
177  
178  /*
179   * R23 (0x17) - IN2 Line Control
180   */
181  #define WM9090_IN2_DIFF                         0x0002  /* IN2_DIFF */
182  #define WM9090_IN2_DIFF_MASK                    0x0002  /* IN2_DIFF */
183  #define WM9090_IN2_DIFF_SHIFT                        1  /* IN2_DIFF */
184  #define WM9090_IN2_DIFF_WIDTH                        1  /* IN2_DIFF */
185  #define WM9090_IN2_CLAMP                        0x0001  /* IN2_CLAMP */
186  #define WM9090_IN2_CLAMP_MASK                   0x0001  /* IN2_CLAMP */
187  #define WM9090_IN2_CLAMP_SHIFT                       0  /* IN2_CLAMP */
188  #define WM9090_IN2_CLAMP_WIDTH                       1  /* IN2_CLAMP */
189  
190  /*
191   * R24 (0x18) - IN1 Line Input A Volume
192   */
193  #define WM9090_IN1_VU                           0x0100  /* IN1_VU */
194  #define WM9090_IN1_VU_MASK                      0x0100  /* IN1_VU */
195  #define WM9090_IN1_VU_SHIFT                          8  /* IN1_VU */
196  #define WM9090_IN1_VU_WIDTH                          1  /* IN1_VU */
197  #define WM9090_IN1A_MUTE                        0x0080  /* IN1A_MUTE */
198  #define WM9090_IN1A_MUTE_MASK                   0x0080  /* IN1A_MUTE */
199  #define WM9090_IN1A_MUTE_SHIFT                       7  /* IN1A_MUTE */
200  #define WM9090_IN1A_MUTE_WIDTH                       1  /* IN1A_MUTE */
201  #define WM9090_IN1A_ZC                          0x0040  /* IN1A_ZC */
202  #define WM9090_IN1A_ZC_MASK                     0x0040  /* IN1A_ZC */
203  #define WM9090_IN1A_ZC_SHIFT                         6  /* IN1A_ZC */
204  #define WM9090_IN1A_ZC_WIDTH                         1  /* IN1A_ZC */
205  #define WM9090_IN1A_VOL_MASK                    0x0007  /* IN1A_VOL - [2:0] */
206  #define WM9090_IN1A_VOL_SHIFT                        0  /* IN1A_VOL - [2:0] */
207  #define WM9090_IN1A_VOL_WIDTH                        3  /* IN1A_VOL - [2:0] */
208  
209  /*
210   * R25 (0x19) - IN1  Line Input B Volume
211   */
212  #define WM9090_IN1_VU                           0x0100  /* IN1_VU */
213  #define WM9090_IN1_VU_MASK                      0x0100  /* IN1_VU */
214  #define WM9090_IN1_VU_SHIFT                          8  /* IN1_VU */
215  #define WM9090_IN1_VU_WIDTH                          1  /* IN1_VU */
216  #define WM9090_IN1B_MUTE                        0x0080  /* IN1B_MUTE */
217  #define WM9090_IN1B_MUTE_MASK                   0x0080  /* IN1B_MUTE */
218  #define WM9090_IN1B_MUTE_SHIFT                       7  /* IN1B_MUTE */
219  #define WM9090_IN1B_MUTE_WIDTH                       1  /* IN1B_MUTE */
220  #define WM9090_IN1B_ZC                          0x0040  /* IN1B_ZC */
221  #define WM9090_IN1B_ZC_MASK                     0x0040  /* IN1B_ZC */
222  #define WM9090_IN1B_ZC_SHIFT                         6  /* IN1B_ZC */
223  #define WM9090_IN1B_ZC_WIDTH                         1  /* IN1B_ZC */
224  #define WM9090_IN1B_VOL_MASK                    0x0007  /* IN1B_VOL - [2:0] */
225  #define WM9090_IN1B_VOL_SHIFT                        0  /* IN1B_VOL - [2:0] */
226  #define WM9090_IN1B_VOL_WIDTH                        3  /* IN1B_VOL - [2:0] */
227  
228  /*
229   * R26 (0x1A) - IN2 Line Input A Volume
230   */
231  #define WM9090_IN2_VU                           0x0100  /* IN2_VU */
232  #define WM9090_IN2_VU_MASK                      0x0100  /* IN2_VU */
233  #define WM9090_IN2_VU_SHIFT                          8  /* IN2_VU */
234  #define WM9090_IN2_VU_WIDTH                          1  /* IN2_VU */
235  #define WM9090_IN2A_MUTE                        0x0080  /* IN2A_MUTE */
236  #define WM9090_IN2A_MUTE_MASK                   0x0080  /* IN2A_MUTE */
237  #define WM9090_IN2A_MUTE_SHIFT                       7  /* IN2A_MUTE */
238  #define WM9090_IN2A_MUTE_WIDTH                       1  /* IN2A_MUTE */
239  #define WM9090_IN2A_ZC                          0x0040  /* IN2A_ZC */
240  #define WM9090_IN2A_ZC_MASK                     0x0040  /* IN2A_ZC */
241  #define WM9090_IN2A_ZC_SHIFT                         6  /* IN2A_ZC */
242  #define WM9090_IN2A_ZC_WIDTH                         1  /* IN2A_ZC */
243  #define WM9090_IN2A_VOL_MASK                    0x0007  /* IN2A_VOL - [2:0] */
244  #define WM9090_IN2A_VOL_SHIFT                        0  /* IN2A_VOL - [2:0] */
245  #define WM9090_IN2A_VOL_WIDTH                        3  /* IN2A_VOL - [2:0] */
246  
247  /*
248   * R27 (0x1B) - IN2 Line Input B Volume
249   */
250  #define WM9090_IN2_VU                           0x0100  /* IN2_VU */
251  #define WM9090_IN2_VU_MASK                      0x0100  /* IN2_VU */
252  #define WM9090_IN2_VU_SHIFT                          8  /* IN2_VU */
253  #define WM9090_IN2_VU_WIDTH                          1  /* IN2_VU */
254  #define WM9090_IN2B_MUTE                        0x0080  /* IN2B_MUTE */
255  #define WM9090_IN2B_MUTE_MASK                   0x0080  /* IN2B_MUTE */
256  #define WM9090_IN2B_MUTE_SHIFT                       7  /* IN2B_MUTE */
257  #define WM9090_IN2B_MUTE_WIDTH                       1  /* IN2B_MUTE */
258  #define WM9090_IN2B_ZC                          0x0040  /* IN2B_ZC */
259  #define WM9090_IN2B_ZC_MASK                     0x0040  /* IN2B_ZC */
260  #define WM9090_IN2B_ZC_SHIFT                         6  /* IN2B_ZC */
261  #define WM9090_IN2B_ZC_WIDTH                         1  /* IN2B_ZC */
262  #define WM9090_IN2B_VOL_MASK                    0x0007  /* IN2B_VOL - [2:0] */
263  #define WM9090_IN2B_VOL_SHIFT                        0  /* IN2B_VOL - [2:0] */
264  #define WM9090_IN2B_VOL_WIDTH                        3  /* IN2B_VOL - [2:0] */
265  
266  /*
267   * R28 (0x1C) - Left Output Volume
268   */
269  #define WM9090_HPOUT1_VU                        0x0100  /* HPOUT1_VU */
270  #define WM9090_HPOUT1_VU_MASK                   0x0100  /* HPOUT1_VU */
271  #define WM9090_HPOUT1_VU_SHIFT                       8  /* HPOUT1_VU */
272  #define WM9090_HPOUT1_VU_WIDTH                       1  /* HPOUT1_VU */
273  #define WM9090_HPOUT1L_ZC                       0x0080  /* HPOUT1L_ZC */
274  #define WM9090_HPOUT1L_ZC_MASK                  0x0080  /* HPOUT1L_ZC */
275  #define WM9090_HPOUT1L_ZC_SHIFT                      7  /* HPOUT1L_ZC */
276  #define WM9090_HPOUT1L_ZC_WIDTH                      1  /* HPOUT1L_ZC */
277  #define WM9090_HPOUT1L_MUTE                     0x0040  /* HPOUT1L_MUTE */
278  #define WM9090_HPOUT1L_MUTE_MASK                0x0040  /* HPOUT1L_MUTE */
279  #define WM9090_HPOUT1L_MUTE_SHIFT                    6  /* HPOUT1L_MUTE */
280  #define WM9090_HPOUT1L_MUTE_WIDTH                    1  /* HPOUT1L_MUTE */
281  #define WM9090_HPOUT1L_VOL_MASK                 0x003F  /* HPOUT1L_VOL - [5:0] */
282  #define WM9090_HPOUT1L_VOL_SHIFT                     0  /* HPOUT1L_VOL - [5:0] */
283  #define WM9090_HPOUT1L_VOL_WIDTH                     6  /* HPOUT1L_VOL - [5:0] */
284  
285  /*
286   * R29 (0x1D) - Right Output Volume
287   */
288  #define WM9090_HPOUT1_VU                        0x0100  /* HPOUT1_VU */
289  #define WM9090_HPOUT1_VU_MASK                   0x0100  /* HPOUT1_VU */
290  #define WM9090_HPOUT1_VU_SHIFT                       8  /* HPOUT1_VU */
291  #define WM9090_HPOUT1_VU_WIDTH                       1  /* HPOUT1_VU */
292  #define WM9090_HPOUT1R_ZC                       0x0080  /* HPOUT1R_ZC */
293  #define WM9090_HPOUT1R_ZC_MASK                  0x0080  /* HPOUT1R_ZC */
294  #define WM9090_HPOUT1R_ZC_SHIFT                      7  /* HPOUT1R_ZC */
295  #define WM9090_HPOUT1R_ZC_WIDTH                      1  /* HPOUT1R_ZC */
296  #define WM9090_HPOUT1R_MUTE                     0x0040  /* HPOUT1R_MUTE */
297  #define WM9090_HPOUT1R_MUTE_MASK                0x0040  /* HPOUT1R_MUTE */
298  #define WM9090_HPOUT1R_MUTE_SHIFT                    6  /* HPOUT1R_MUTE */
299  #define WM9090_HPOUT1R_MUTE_WIDTH                    1  /* HPOUT1R_MUTE */
300  #define WM9090_HPOUT1R_VOL_MASK                 0x003F  /* HPOUT1R_VOL - [5:0] */
301  #define WM9090_HPOUT1R_VOL_SHIFT                     0  /* HPOUT1R_VOL - [5:0] */
302  #define WM9090_HPOUT1R_VOL_WIDTH                     6  /* HPOUT1R_VOL - [5:0] */
303  
304  /*
305   * R34 (0x22) - SPKMIXL Attenuation
306   */
307  #define WM9090_SPKMIX_MUTE                      0x0100  /* SPKMIX_MUTE */
308  #define WM9090_SPKMIX_MUTE_MASK                 0x0100  /* SPKMIX_MUTE */
309  #define WM9090_SPKMIX_MUTE_SHIFT                     8  /* SPKMIX_MUTE */
310  #define WM9090_SPKMIX_MUTE_WIDTH                     1  /* SPKMIX_MUTE */
311  #define WM9090_IN1A_SPKMIX_VOL_MASK             0x00C0  /* IN1A_SPKMIX_VOL - [7:6] */
312  #define WM9090_IN1A_SPKMIX_VOL_SHIFT                 6  /* IN1A_SPKMIX_VOL - [7:6] */
313  #define WM9090_IN1A_SPKMIX_VOL_WIDTH                 2  /* IN1A_SPKMIX_VOL - [7:6] */
314  #define WM9090_IN1B_SPKMIX_VOL_MASK             0x0030  /* IN1B_SPKMIX_VOL - [5:4] */
315  #define WM9090_IN1B_SPKMIX_VOL_SHIFT                 4  /* IN1B_SPKMIX_VOL - [5:4] */
316  #define WM9090_IN1B_SPKMIX_VOL_WIDTH                 2  /* IN1B_SPKMIX_VOL - [5:4] */
317  #define WM9090_IN2A_SPKMIX_VOL_MASK             0x000C  /* IN2A_SPKMIX_VOL - [3:2] */
318  #define WM9090_IN2A_SPKMIX_VOL_SHIFT                 2  /* IN2A_SPKMIX_VOL - [3:2] */
319  #define WM9090_IN2A_SPKMIX_VOL_WIDTH                 2  /* IN2A_SPKMIX_VOL - [3:2] */
320  #define WM9090_IN2B_SPKMIX_VOL_MASK             0x0003  /* IN2B_SPKMIX_VOL - [1:0] */
321  #define WM9090_IN2B_SPKMIX_VOL_SHIFT                 0  /* IN2B_SPKMIX_VOL - [1:0] */
322  #define WM9090_IN2B_SPKMIX_VOL_WIDTH                 2  /* IN2B_SPKMIX_VOL - [1:0] */
323  
324  /*
325   * R36 (0x24) - SPKOUT Mixers
326   */
327  #define WM9090_SPKMIXL_TO_SPKOUTL               0x0010  /* SPKMIXL_TO_SPKOUTL */
328  #define WM9090_SPKMIXL_TO_SPKOUTL_MASK          0x0010  /* SPKMIXL_TO_SPKOUTL */
329  #define WM9090_SPKMIXL_TO_SPKOUTL_SHIFT              4  /* SPKMIXL_TO_SPKOUTL */
330  #define WM9090_SPKMIXL_TO_SPKOUTL_WIDTH              1  /* SPKMIXL_TO_SPKOUTL */
331  
332  /*
333   * R37 (0x25) - ClassD3
334   */
335  #define WM9090_SPKOUTL_BOOST_MASK               0x0038  /* SPKOUTL_BOOST - [5:3] */
336  #define WM9090_SPKOUTL_BOOST_SHIFT                   3  /* SPKOUTL_BOOST - [5:3] */
337  #define WM9090_SPKOUTL_BOOST_WIDTH                   3  /* SPKOUTL_BOOST - [5:3] */
338  
339  /*
340   * R38 (0x26) - Speaker Volume Left
341   */
342  #define WM9090_SPKOUT_VU                        0x0100  /* SPKOUT_VU */
343  #define WM9090_SPKOUT_VU_MASK                   0x0100  /* SPKOUT_VU */
344  #define WM9090_SPKOUT_VU_SHIFT                       8  /* SPKOUT_VU */
345  #define WM9090_SPKOUT_VU_WIDTH                       1  /* SPKOUT_VU */
346  #define WM9090_SPKOUTL_ZC                       0x0080  /* SPKOUTL_ZC */
347  #define WM9090_SPKOUTL_ZC_MASK                  0x0080  /* SPKOUTL_ZC */
348  #define WM9090_SPKOUTL_ZC_SHIFT                      7  /* SPKOUTL_ZC */
349  #define WM9090_SPKOUTL_ZC_WIDTH                      1  /* SPKOUTL_ZC */
350  #define WM9090_SPKOUTL_MUTE                     0x0040  /* SPKOUTL_MUTE */
351  #define WM9090_SPKOUTL_MUTE_MASK                0x0040  /* SPKOUTL_MUTE */
352  #define WM9090_SPKOUTL_MUTE_SHIFT                    6  /* SPKOUTL_MUTE */
353  #define WM9090_SPKOUTL_MUTE_WIDTH                    1  /* SPKOUTL_MUTE */
354  #define WM9090_SPKOUTL_VOL_MASK                 0x003F  /* SPKOUTL_VOL - [5:0] */
355  #define WM9090_SPKOUTL_VOL_SHIFT                     0  /* SPKOUTL_VOL - [5:0] */
356  #define WM9090_SPKOUTL_VOL_WIDTH                     6  /* SPKOUTL_VOL - [5:0] */
357  
358  /*
359   * R45 (0x2D) - Output Mixer1
360   */
361  #define WM9090_IN1A_TO_MIXOUTL                  0x0040  /* IN1A_TO_MIXOUTL */
362  #define WM9090_IN1A_TO_MIXOUTL_MASK             0x0040  /* IN1A_TO_MIXOUTL */
363  #define WM9090_IN1A_TO_MIXOUTL_SHIFT                 6  /* IN1A_TO_MIXOUTL */
364  #define WM9090_IN1A_TO_MIXOUTL_WIDTH                 1  /* IN1A_TO_MIXOUTL */
365  #define WM9090_IN2A_TO_MIXOUTL                  0x0004  /* IN2A_TO_MIXOUTL */
366  #define WM9090_IN2A_TO_MIXOUTL_MASK             0x0004  /* IN2A_TO_MIXOUTL */
367  #define WM9090_IN2A_TO_MIXOUTL_SHIFT                 2  /* IN2A_TO_MIXOUTL */
368  #define WM9090_IN2A_TO_MIXOUTL_WIDTH                 1  /* IN2A_TO_MIXOUTL */
369  
370  /*
371   * R46 (0x2E) - Output Mixer2
372   */
373  #define WM9090_IN1A_TO_MIXOUTR                  0x0040  /* IN1A_TO_MIXOUTR */
374  #define WM9090_IN1A_TO_MIXOUTR_MASK             0x0040  /* IN1A_TO_MIXOUTR */
375  #define WM9090_IN1A_TO_MIXOUTR_SHIFT                 6  /* IN1A_TO_MIXOUTR */
376  #define WM9090_IN1A_TO_MIXOUTR_WIDTH                 1  /* IN1A_TO_MIXOUTR */
377  #define WM9090_IN1B_TO_MIXOUTR                  0x0010  /* IN1B_TO_MIXOUTR */
378  #define WM9090_IN1B_TO_MIXOUTR_MASK             0x0010  /* IN1B_TO_MIXOUTR */
379  #define WM9090_IN1B_TO_MIXOUTR_SHIFT                 4  /* IN1B_TO_MIXOUTR */
380  #define WM9090_IN1B_TO_MIXOUTR_WIDTH                 1  /* IN1B_TO_MIXOUTR */
381  #define WM9090_IN2A_TO_MIXOUTR                  0x0004  /* IN2A_TO_MIXOUTR */
382  #define WM9090_IN2A_TO_MIXOUTR_MASK             0x0004  /* IN2A_TO_MIXOUTR */
383  #define WM9090_IN2A_TO_MIXOUTR_SHIFT                 2  /* IN2A_TO_MIXOUTR */
384  #define WM9090_IN2A_TO_MIXOUTR_WIDTH                 1  /* IN2A_TO_MIXOUTR */
385  #define WM9090_IN2B_TO_MIXOUTR                  0x0001  /* IN2B_TO_MIXOUTR */
386  #define WM9090_IN2B_TO_MIXOUTR_MASK             0x0001  /* IN2B_TO_MIXOUTR */
387  #define WM9090_IN2B_TO_MIXOUTR_SHIFT                 0  /* IN2B_TO_MIXOUTR */
388  #define WM9090_IN2B_TO_MIXOUTR_WIDTH                 1  /* IN2B_TO_MIXOUTR */
389  
390  /*
391   * R47 (0x2F) - Output Mixer3
392   */
393  #define WM9090_MIXOUTL_MUTE                     0x0100  /* MIXOUTL_MUTE */
394  #define WM9090_MIXOUTL_MUTE_MASK                0x0100  /* MIXOUTL_MUTE */
395  #define WM9090_MIXOUTL_MUTE_SHIFT                    8  /* MIXOUTL_MUTE */
396  #define WM9090_MIXOUTL_MUTE_WIDTH                    1  /* MIXOUTL_MUTE */
397  #define WM9090_IN1A_MIXOUTL_VOL_MASK            0x00C0  /* IN1A_MIXOUTL_VOL - [7:6] */
398  #define WM9090_IN1A_MIXOUTL_VOL_SHIFT                6  /* IN1A_MIXOUTL_VOL - [7:6] */
399  #define WM9090_IN1A_MIXOUTL_VOL_WIDTH                2  /* IN1A_MIXOUTL_VOL - [7:6] */
400  #define WM9090_IN2A_MIXOUTL_VOL_MASK            0x000C  /* IN2A_MIXOUTL_VOL - [3:2] */
401  #define WM9090_IN2A_MIXOUTL_VOL_SHIFT                2  /* IN2A_MIXOUTL_VOL - [3:2] */
402  #define WM9090_IN2A_MIXOUTL_VOL_WIDTH                2  /* IN2A_MIXOUTL_VOL - [3:2] */
403  
404  /*
405   * R48 (0x30) - Output Mixer4
406   */
407  #define WM9090_MIXOUTR_MUTE                     0x0100  /* MIXOUTR_MUTE */
408  #define WM9090_MIXOUTR_MUTE_MASK                0x0100  /* MIXOUTR_MUTE */
409  #define WM9090_MIXOUTR_MUTE_SHIFT                    8  /* MIXOUTR_MUTE */
410  #define WM9090_MIXOUTR_MUTE_WIDTH                    1  /* MIXOUTR_MUTE */
411  #define WM9090_IN1A_MIXOUTR_VOL_MASK            0x00C0  /* IN1A_MIXOUTR_VOL - [7:6] */
412  #define WM9090_IN1A_MIXOUTR_VOL_SHIFT                6  /* IN1A_MIXOUTR_VOL - [7:6] */
413  #define WM9090_IN1A_MIXOUTR_VOL_WIDTH                2  /* IN1A_MIXOUTR_VOL - [7:6] */
414  #define WM9090_IN1B_MIXOUTR_VOL_MASK            0x0030  /* IN1B_MIXOUTR_VOL - [5:4] */
415  #define WM9090_IN1B_MIXOUTR_VOL_SHIFT                4  /* IN1B_MIXOUTR_VOL - [5:4] */
416  #define WM9090_IN1B_MIXOUTR_VOL_WIDTH                2  /* IN1B_MIXOUTR_VOL - [5:4] */
417  #define WM9090_IN2A_MIXOUTR_VOL_MASK            0x000C  /* IN2A_MIXOUTR_VOL - [3:2] */
418  #define WM9090_IN2A_MIXOUTR_VOL_SHIFT                2  /* IN2A_MIXOUTR_VOL - [3:2] */
419  #define WM9090_IN2A_MIXOUTR_VOL_WIDTH                2  /* IN2A_MIXOUTR_VOL - [3:2] */
420  #define WM9090_IN2B_MIXOUTR_VOL_MASK            0x0003  /* IN2B_MIXOUTR_VOL - [1:0] */
421  #define WM9090_IN2B_MIXOUTR_VOL_SHIFT                0  /* IN2B_MIXOUTR_VOL - [1:0] */
422  #define WM9090_IN2B_MIXOUTR_VOL_WIDTH                2  /* IN2B_MIXOUTR_VOL - [1:0] */
423  
424  /*
425   * R54 (0x36) - Speaker Mixer
426   */
427  #define WM9090_IN1A_TO_SPKMIX                   0x0040  /* IN1A_TO_SPKMIX */
428  #define WM9090_IN1A_TO_SPKMIX_MASK              0x0040  /* IN1A_TO_SPKMIX */
429  #define WM9090_IN1A_TO_SPKMIX_SHIFT                  6  /* IN1A_TO_SPKMIX */
430  #define WM9090_IN1A_TO_SPKMIX_WIDTH                  1  /* IN1A_TO_SPKMIX */
431  #define WM9090_IN1B_TO_SPKMIX                   0x0010  /* IN1B_TO_SPKMIX */
432  #define WM9090_IN1B_TO_SPKMIX_MASK              0x0010  /* IN1B_TO_SPKMIX */
433  #define WM9090_IN1B_TO_SPKMIX_SHIFT                  4  /* IN1B_TO_SPKMIX */
434  #define WM9090_IN1B_TO_SPKMIX_WIDTH                  1  /* IN1B_TO_SPKMIX */
435  #define WM9090_IN2A_TO_SPKMIX                   0x0004  /* IN2A_TO_SPKMIX */
436  #define WM9090_IN2A_TO_SPKMIX_MASK              0x0004  /* IN2A_TO_SPKMIX */
437  #define WM9090_IN2A_TO_SPKMIX_SHIFT                  2  /* IN2A_TO_SPKMIX */
438  #define WM9090_IN2A_TO_SPKMIX_WIDTH                  1  /* IN2A_TO_SPKMIX */
439  #define WM9090_IN2B_TO_SPKMIX                   0x0001  /* IN2B_TO_SPKMIX */
440  #define WM9090_IN2B_TO_SPKMIX_MASK              0x0001  /* IN2B_TO_SPKMIX */
441  #define WM9090_IN2B_TO_SPKMIX_SHIFT                  0  /* IN2B_TO_SPKMIX */
442  #define WM9090_IN2B_TO_SPKMIX_WIDTH                  1  /* IN2B_TO_SPKMIX */
443  
444  /*
445   * R57 (0x39) - AntiPOP2
446   */
447  #define WM9090_VMID_BUF_ENA                     0x0008  /* VMID_BUF_ENA */
448  #define WM9090_VMID_BUF_ENA_MASK                0x0008  /* VMID_BUF_ENA */
449  #define WM9090_VMID_BUF_ENA_SHIFT                    3  /* VMID_BUF_ENA */
450  #define WM9090_VMID_BUF_ENA_WIDTH                    1  /* VMID_BUF_ENA */
451  #define WM9090_VMID_ENA                         0x0001  /* VMID_ENA */
452  #define WM9090_VMID_ENA_MASK                    0x0001  /* VMID_ENA */
453  #define WM9090_VMID_ENA_SHIFT                        0  /* VMID_ENA */
454  #define WM9090_VMID_ENA_WIDTH                        1  /* VMID_ENA */
455  
456  /*
457   * R70 (0x46) - Write Sequencer 0
458   */
459  #define WM9090_WSEQ_ENA                         0x0100  /* WSEQ_ENA */
460  #define WM9090_WSEQ_ENA_MASK                    0x0100  /* WSEQ_ENA */
461  #define WM9090_WSEQ_ENA_SHIFT                        8  /* WSEQ_ENA */
462  #define WM9090_WSEQ_ENA_WIDTH                        1  /* WSEQ_ENA */
463  #define WM9090_WSEQ_WRITE_INDEX_MASK            0x000F  /* WSEQ_WRITE_INDEX - [3:0] */
464  #define WM9090_WSEQ_WRITE_INDEX_SHIFT                0  /* WSEQ_WRITE_INDEX - [3:0] */
465  #define WM9090_WSEQ_WRITE_INDEX_WIDTH                4  /* WSEQ_WRITE_INDEX - [3:0] */
466  
467  /*
468   * R71 (0x47) - Write Sequencer 1
469   */
470  #define WM9090_WSEQ_DATA_WIDTH_MASK             0x7000  /* WSEQ_DATA_WIDTH - [14:12] */
471  #define WM9090_WSEQ_DATA_WIDTH_SHIFT                12  /* WSEQ_DATA_WIDTH - [14:12] */
472  #define WM9090_WSEQ_DATA_WIDTH_WIDTH                 3  /* WSEQ_DATA_WIDTH - [14:12] */
473  #define WM9090_WSEQ_DATA_START_MASK             0x0F00  /* WSEQ_DATA_START - [11:8] */
474  #define WM9090_WSEQ_DATA_START_SHIFT                 8  /* WSEQ_DATA_START - [11:8] */
475  #define WM9090_WSEQ_DATA_START_WIDTH                 4  /* WSEQ_DATA_START - [11:8] */
476  #define WM9090_WSEQ_ADDR_MASK                   0x00FF  /* WSEQ_ADDR - [7:0] */
477  #define WM9090_WSEQ_ADDR_SHIFT                       0  /* WSEQ_ADDR - [7:0] */
478  #define WM9090_WSEQ_ADDR_WIDTH                       8  /* WSEQ_ADDR - [7:0] */
479  
480  /*
481   * R72 (0x48) - Write Sequencer 2
482   */
483  #define WM9090_WSEQ_EOS                         0x4000  /* WSEQ_EOS */
484  #define WM9090_WSEQ_EOS_MASK                    0x4000  /* WSEQ_EOS */
485  #define WM9090_WSEQ_EOS_SHIFT                       14  /* WSEQ_EOS */
486  #define WM9090_WSEQ_EOS_WIDTH                        1  /* WSEQ_EOS */
487  #define WM9090_WSEQ_DELAY_MASK                  0x0F00  /* WSEQ_DELAY - [11:8] */
488  #define WM9090_WSEQ_DELAY_SHIFT                      8  /* WSEQ_DELAY - [11:8] */
489  #define WM9090_WSEQ_DELAY_WIDTH                      4  /* WSEQ_DELAY - [11:8] */
490  #define WM9090_WSEQ_DATA_MASK                   0x00FF  /* WSEQ_DATA - [7:0] */
491  #define WM9090_WSEQ_DATA_SHIFT                       0  /* WSEQ_DATA - [7:0] */
492  #define WM9090_WSEQ_DATA_WIDTH                       8  /* WSEQ_DATA - [7:0] */
493  
494  /*
495   * R73 (0x49) - Write Sequencer 3
496   */
497  #define WM9090_WSEQ_ABORT                       0x0200  /* WSEQ_ABORT */
498  #define WM9090_WSEQ_ABORT_MASK                  0x0200  /* WSEQ_ABORT */
499  #define WM9090_WSEQ_ABORT_SHIFT                      9  /* WSEQ_ABORT */
500  #define WM9090_WSEQ_ABORT_WIDTH                      1  /* WSEQ_ABORT */
501  #define WM9090_WSEQ_START                       0x0100  /* WSEQ_START */
502  #define WM9090_WSEQ_START_MASK                  0x0100  /* WSEQ_START */
503  #define WM9090_WSEQ_START_SHIFT                      8  /* WSEQ_START */
504  #define WM9090_WSEQ_START_WIDTH                      1  /* WSEQ_START */
505  #define WM9090_WSEQ_START_INDEX_MASK            0x003F  /* WSEQ_START_INDEX - [5:0] */
506  #define WM9090_WSEQ_START_INDEX_SHIFT                0  /* WSEQ_START_INDEX - [5:0] */
507  #define WM9090_WSEQ_START_INDEX_WIDTH                6  /* WSEQ_START_INDEX - [5:0] */
508  
509  /*
510   * R74 (0x4A) - Write Sequencer 4
511   */
512  #define WM9090_WSEQ_BUSY                        0x0001  /* WSEQ_BUSY */
513  #define WM9090_WSEQ_BUSY_MASK                   0x0001  /* WSEQ_BUSY */
514  #define WM9090_WSEQ_BUSY_SHIFT                       0  /* WSEQ_BUSY */
515  #define WM9090_WSEQ_BUSY_WIDTH                       1  /* WSEQ_BUSY */
516  
517  /*
518   * R75 (0x4B) - Write Sequencer 5
519   */
520  #define WM9090_WSEQ_CURRENT_INDEX_MASK          0x003F  /* WSEQ_CURRENT_INDEX - [5:0] */
521  #define WM9090_WSEQ_CURRENT_INDEX_SHIFT              0  /* WSEQ_CURRENT_INDEX - [5:0] */
522  #define WM9090_WSEQ_CURRENT_INDEX_WIDTH              6  /* WSEQ_CURRENT_INDEX - [5:0] */
523  
524  /*
525   * R76 (0x4C) - Charge Pump 1
526   */
527  #define WM9090_CP_ENA                           0x8000  /* CP_ENA */
528  #define WM9090_CP_ENA_MASK                      0x8000  /* CP_ENA */
529  #define WM9090_CP_ENA_SHIFT                         15  /* CP_ENA */
530  #define WM9090_CP_ENA_WIDTH                          1  /* CP_ENA */
531  
532  /*
533   * R84 (0x54) - DC Servo 0
534   */
535  #define WM9090_DCS_TRIG_SINGLE_1                0x2000  /* DCS_TRIG_SINGLE_1 */
536  #define WM9090_DCS_TRIG_SINGLE_1_MASK           0x2000  /* DCS_TRIG_SINGLE_1 */
537  #define WM9090_DCS_TRIG_SINGLE_1_SHIFT              13  /* DCS_TRIG_SINGLE_1 */
538  #define WM9090_DCS_TRIG_SINGLE_1_WIDTH               1  /* DCS_TRIG_SINGLE_1 */
539  #define WM9090_DCS_TRIG_SINGLE_0                0x1000  /* DCS_TRIG_SINGLE_0 */
540  #define WM9090_DCS_TRIG_SINGLE_0_MASK           0x1000  /* DCS_TRIG_SINGLE_0 */
541  #define WM9090_DCS_TRIG_SINGLE_0_SHIFT              12  /* DCS_TRIG_SINGLE_0 */
542  #define WM9090_DCS_TRIG_SINGLE_0_WIDTH               1  /* DCS_TRIG_SINGLE_0 */
543  #define WM9090_DCS_TRIG_SERIES_1                0x0200  /* DCS_TRIG_SERIES_1 */
544  #define WM9090_DCS_TRIG_SERIES_1_MASK           0x0200  /* DCS_TRIG_SERIES_1 */
545  #define WM9090_DCS_TRIG_SERIES_1_SHIFT               9  /* DCS_TRIG_SERIES_1 */
546  #define WM9090_DCS_TRIG_SERIES_1_WIDTH               1  /* DCS_TRIG_SERIES_1 */
547  #define WM9090_DCS_TRIG_SERIES_0                0x0100  /* DCS_TRIG_SERIES_0 */
548  #define WM9090_DCS_TRIG_SERIES_0_MASK           0x0100  /* DCS_TRIG_SERIES_0 */
549  #define WM9090_DCS_TRIG_SERIES_0_SHIFT               8  /* DCS_TRIG_SERIES_0 */
550  #define WM9090_DCS_TRIG_SERIES_0_WIDTH               1  /* DCS_TRIG_SERIES_0 */
551  #define WM9090_DCS_TRIG_STARTUP_1               0x0020  /* DCS_TRIG_STARTUP_1 */
552  #define WM9090_DCS_TRIG_STARTUP_1_MASK          0x0020  /* DCS_TRIG_STARTUP_1 */
553  #define WM9090_DCS_TRIG_STARTUP_1_SHIFT              5  /* DCS_TRIG_STARTUP_1 */
554  #define WM9090_DCS_TRIG_STARTUP_1_WIDTH              1  /* DCS_TRIG_STARTUP_1 */
555  #define WM9090_DCS_TRIG_STARTUP_0               0x0010  /* DCS_TRIG_STARTUP_0 */
556  #define WM9090_DCS_TRIG_STARTUP_0_MASK          0x0010  /* DCS_TRIG_STARTUP_0 */
557  #define WM9090_DCS_TRIG_STARTUP_0_SHIFT              4  /* DCS_TRIG_STARTUP_0 */
558  #define WM9090_DCS_TRIG_STARTUP_0_WIDTH              1  /* DCS_TRIG_STARTUP_0 */
559  #define WM9090_DCS_TRIG_DAC_WR_1                0x0008  /* DCS_TRIG_DAC_WR_1 */
560  #define WM9090_DCS_TRIG_DAC_WR_1_MASK           0x0008  /* DCS_TRIG_DAC_WR_1 */
561  #define WM9090_DCS_TRIG_DAC_WR_1_SHIFT               3  /* DCS_TRIG_DAC_WR_1 */
562  #define WM9090_DCS_TRIG_DAC_WR_1_WIDTH               1  /* DCS_TRIG_DAC_WR_1 */
563  #define WM9090_DCS_TRIG_DAC_WR_0                0x0004  /* DCS_TRIG_DAC_WR_0 */
564  #define WM9090_DCS_TRIG_DAC_WR_0_MASK           0x0004  /* DCS_TRIG_DAC_WR_0 */
565  #define WM9090_DCS_TRIG_DAC_WR_0_SHIFT               2  /* DCS_TRIG_DAC_WR_0 */
566  #define WM9090_DCS_TRIG_DAC_WR_0_WIDTH               1  /* DCS_TRIG_DAC_WR_0 */
567  #define WM9090_DCS_ENA_CHAN_1                   0x0002  /* DCS_ENA_CHAN_1 */
568  #define WM9090_DCS_ENA_CHAN_1_MASK              0x0002  /* DCS_ENA_CHAN_1 */
569  #define WM9090_DCS_ENA_CHAN_1_SHIFT                  1  /* DCS_ENA_CHAN_1 */
570  #define WM9090_DCS_ENA_CHAN_1_WIDTH                  1  /* DCS_ENA_CHAN_1 */
571  #define WM9090_DCS_ENA_CHAN_0                   0x0001  /* DCS_ENA_CHAN_0 */
572  #define WM9090_DCS_ENA_CHAN_0_MASK              0x0001  /* DCS_ENA_CHAN_0 */
573  #define WM9090_DCS_ENA_CHAN_0_SHIFT                  0  /* DCS_ENA_CHAN_0 */
574  #define WM9090_DCS_ENA_CHAN_0_WIDTH                  1  /* DCS_ENA_CHAN_0 */
575  
576  /*
577   * R85 (0x55) - DC Servo 1
578   */
579  #define WM9090_DCS_SERIES_NO_01_MASK            0x0FE0  /* DCS_SERIES_NO_01 - [11:5] */
580  #define WM9090_DCS_SERIES_NO_01_SHIFT                5  /* DCS_SERIES_NO_01 - [11:5] */
581  #define WM9090_DCS_SERIES_NO_01_WIDTH                7  /* DCS_SERIES_NO_01 - [11:5] */
582  #define WM9090_DCS_TIMER_PERIOD_01_MASK         0x000F  /* DCS_TIMER_PERIOD_01 - [3:0] */
583  #define WM9090_DCS_TIMER_PERIOD_01_SHIFT             0  /* DCS_TIMER_PERIOD_01 - [3:0] */
584  #define WM9090_DCS_TIMER_PERIOD_01_WIDTH             4  /* DCS_TIMER_PERIOD_01 - [3:0] */
585  
586  /*
587   * R87 (0x57) - DC Servo 3
588   */
589  #define WM9090_DCS_DAC_WR_VAL_1_MASK            0xFF00  /* DCS_DAC_WR_VAL_1 - [15:8] */
590  #define WM9090_DCS_DAC_WR_VAL_1_SHIFT                8  /* DCS_DAC_WR_VAL_1 - [15:8] */
591  #define WM9090_DCS_DAC_WR_VAL_1_WIDTH                8  /* DCS_DAC_WR_VAL_1 - [15:8] */
592  #define WM9090_DCS_DAC_WR_VAL_0_MASK            0x00FF  /* DCS_DAC_WR_VAL_0 - [7:0] */
593  #define WM9090_DCS_DAC_WR_VAL_0_SHIFT                0  /* DCS_DAC_WR_VAL_0 - [7:0] */
594  #define WM9090_DCS_DAC_WR_VAL_0_WIDTH                8  /* DCS_DAC_WR_VAL_0 - [7:0] */
595  
596  /*
597   * R88 (0x58) - DC Servo Readback 0
598   */
599  #define WM9090_DCS_CAL_COMPLETE_MASK            0x0300  /* DCS_CAL_COMPLETE - [9:8] */
600  #define WM9090_DCS_CAL_COMPLETE_SHIFT                8  /* DCS_CAL_COMPLETE - [9:8] */
601  #define WM9090_DCS_CAL_COMPLETE_WIDTH                2  /* DCS_CAL_COMPLETE - [9:8] */
602  #define WM9090_DCS_DAC_WR_COMPLETE_MASK         0x0030  /* DCS_DAC_WR_COMPLETE - [5:4] */
603  #define WM9090_DCS_DAC_WR_COMPLETE_SHIFT             4  /* DCS_DAC_WR_COMPLETE - [5:4] */
604  #define WM9090_DCS_DAC_WR_COMPLETE_WIDTH             2  /* DCS_DAC_WR_COMPLETE - [5:4] */
605  #define WM9090_DCS_STARTUP_COMPLETE_MASK        0x0003  /* DCS_STARTUP_COMPLETE - [1:0] */
606  #define WM9090_DCS_STARTUP_COMPLETE_SHIFT            0  /* DCS_STARTUP_COMPLETE - [1:0] */
607  #define WM9090_DCS_STARTUP_COMPLETE_WIDTH            2  /* DCS_STARTUP_COMPLETE - [1:0] */
608  
609  /*
610   * R89 (0x59) - DC Servo Readback 1
611   */
612  #define WM9090_DCS_DAC_WR_VAL_1_RD_MASK         0x00FF  /* DCS_DAC_WR_VAL_1_RD - [7:0] */
613  #define WM9090_DCS_DAC_WR_VAL_1_RD_SHIFT             0  /* DCS_DAC_WR_VAL_1_RD - [7:0] */
614  #define WM9090_DCS_DAC_WR_VAL_1_RD_WIDTH             8  /* DCS_DAC_WR_VAL_1_RD - [7:0] */
615  
616  /*
617   * R90 (0x5A) - DC Servo Readback 2
618   */
619  #define WM9090_DCS_DAC_WR_VAL_0_RD_MASK         0x00FF  /* DCS_DAC_WR_VAL_0_RD - [7:0] */
620  #define WM9090_DCS_DAC_WR_VAL_0_RD_SHIFT             0  /* DCS_DAC_WR_VAL_0_RD - [7:0] */
621  #define WM9090_DCS_DAC_WR_VAL_0_RD_WIDTH             8  /* DCS_DAC_WR_VAL_0_RD - [7:0] */
622  
623  /*
624   * R96 (0x60) - Analogue HP 0
625   */
626  #define WM9090_HPOUT1L_RMV_SHORT                0x0080  /* HPOUT1L_RMV_SHORT */
627  #define WM9090_HPOUT1L_RMV_SHORT_MASK           0x0080  /* HPOUT1L_RMV_SHORT */
628  #define WM9090_HPOUT1L_RMV_SHORT_SHIFT               7  /* HPOUT1L_RMV_SHORT */
629  #define WM9090_HPOUT1L_RMV_SHORT_WIDTH               1  /* HPOUT1L_RMV_SHORT */
630  #define WM9090_HPOUT1L_OUTP                     0x0040  /* HPOUT1L_OUTP */
631  #define WM9090_HPOUT1L_OUTP_MASK                0x0040  /* HPOUT1L_OUTP */
632  #define WM9090_HPOUT1L_OUTP_SHIFT                    6  /* HPOUT1L_OUTP */
633  #define WM9090_HPOUT1L_OUTP_WIDTH                    1  /* HPOUT1L_OUTP */
634  #define WM9090_HPOUT1L_DLY                      0x0020  /* HPOUT1L_DLY */
635  #define WM9090_HPOUT1L_DLY_MASK                 0x0020  /* HPOUT1L_DLY */
636  #define WM9090_HPOUT1L_DLY_SHIFT                     5  /* HPOUT1L_DLY */
637  #define WM9090_HPOUT1L_DLY_WIDTH                     1  /* HPOUT1L_DLY */
638  #define WM9090_HPOUT1R_RMV_SHORT                0x0008  /* HPOUT1R_RMV_SHORT */
639  #define WM9090_HPOUT1R_RMV_SHORT_MASK           0x0008  /* HPOUT1R_RMV_SHORT */
640  #define WM9090_HPOUT1R_RMV_SHORT_SHIFT               3  /* HPOUT1R_RMV_SHORT */
641  #define WM9090_HPOUT1R_RMV_SHORT_WIDTH               1  /* HPOUT1R_RMV_SHORT */
642  #define WM9090_HPOUT1R_OUTP                     0x0004  /* HPOUT1R_OUTP */
643  #define WM9090_HPOUT1R_OUTP_MASK                0x0004  /* HPOUT1R_OUTP */
644  #define WM9090_HPOUT1R_OUTP_SHIFT                    2  /* HPOUT1R_OUTP */
645  #define WM9090_HPOUT1R_OUTP_WIDTH                    1  /* HPOUT1R_OUTP */
646  #define WM9090_HPOUT1R_DLY                      0x0002  /* HPOUT1R_DLY */
647  #define WM9090_HPOUT1R_DLY_MASK                 0x0002  /* HPOUT1R_DLY */
648  #define WM9090_HPOUT1R_DLY_SHIFT                     1  /* HPOUT1R_DLY */
649  #define WM9090_HPOUT1R_DLY_WIDTH                     1  /* HPOUT1R_DLY */
650  
651  /*
652   * R98 (0x62) - AGC Control 0
653   */
654  #define WM9090_AGC_CLIP_ENA                     0x8000  /* AGC_CLIP_ENA */
655  #define WM9090_AGC_CLIP_ENA_MASK                0x8000  /* AGC_CLIP_ENA */
656  #define WM9090_AGC_CLIP_ENA_SHIFT                   15  /* AGC_CLIP_ENA */
657  #define WM9090_AGC_CLIP_ENA_WIDTH                    1  /* AGC_CLIP_ENA */
658  #define WM9090_AGC_CLIP_THR_MASK                0x0F00  /* AGC_CLIP_THR - [11:8] */
659  #define WM9090_AGC_CLIP_THR_SHIFT                    8  /* AGC_CLIP_THR - [11:8] */
660  #define WM9090_AGC_CLIP_THR_WIDTH                    4  /* AGC_CLIP_THR - [11:8] */
661  #define WM9090_AGC_CLIP_ATK_MASK                0x0070  /* AGC_CLIP_ATK - [6:4] */
662  #define WM9090_AGC_CLIP_ATK_SHIFT                    4  /* AGC_CLIP_ATK - [6:4] */
663  #define WM9090_AGC_CLIP_ATK_WIDTH                    3  /* AGC_CLIP_ATK - [6:4] */
664  #define WM9090_AGC_CLIP_DCY_MASK                0x0007  /* AGC_CLIP_DCY - [2:0] */
665  #define WM9090_AGC_CLIP_DCY_SHIFT                    0  /* AGC_CLIP_DCY - [2:0] */
666  #define WM9090_AGC_CLIP_DCY_WIDTH                    3  /* AGC_CLIP_DCY - [2:0] */
667  
668  /*
669   * R99 (0x63) - AGC Control 1
670   */
671  #define WM9090_AGC_PWR_ENA                      0x8000  /* AGC_PWR_ENA */
672  #define WM9090_AGC_PWR_ENA_MASK                 0x8000  /* AGC_PWR_ENA */
673  #define WM9090_AGC_PWR_ENA_SHIFT                    15  /* AGC_PWR_ENA */
674  #define WM9090_AGC_PWR_ENA_WIDTH                     1  /* AGC_PWR_ENA */
675  #define WM9090_AGC_PWR_AVG                      0x1000  /* AGC_PWR_AVG */
676  #define WM9090_AGC_PWR_AVG_MASK                 0x1000  /* AGC_PWR_AVG */
677  #define WM9090_AGC_PWR_AVG_SHIFT                    12  /* AGC_PWR_AVG */
678  #define WM9090_AGC_PWR_AVG_WIDTH                     1  /* AGC_PWR_AVG */
679  #define WM9090_AGC_PWR_THR_MASK                 0x0F00  /* AGC_PWR_THR - [11:8] */
680  #define WM9090_AGC_PWR_THR_SHIFT                     8  /* AGC_PWR_THR - [11:8] */
681  #define WM9090_AGC_PWR_THR_WIDTH                     4  /* AGC_PWR_THR - [11:8] */
682  #define WM9090_AGC_PWR_ATK_MASK                 0x0070  /* AGC_PWR_ATK - [6:4] */
683  #define WM9090_AGC_PWR_ATK_SHIFT                     4  /* AGC_PWR_ATK - [6:4] */
684  #define WM9090_AGC_PWR_ATK_WIDTH                     3  /* AGC_PWR_ATK - [6:4] */
685  #define WM9090_AGC_PWR_DCY_MASK                 0x0007  /* AGC_PWR_DCY - [2:0] */
686  #define WM9090_AGC_PWR_DCY_SHIFT                     0  /* AGC_PWR_DCY - [2:0] */
687  #define WM9090_AGC_PWR_DCY_WIDTH                     3  /* AGC_PWR_DCY - [2:0] */
688  
689  /*
690   * R100 (0x64) - AGC Control 2
691   */
692  #define WM9090_AGC_RAMP                         0x0100  /* AGC_RAMP */
693  #define WM9090_AGC_RAMP_MASK                    0x0100  /* AGC_RAMP */
694  #define WM9090_AGC_RAMP_SHIFT                        8  /* AGC_RAMP */
695  #define WM9090_AGC_RAMP_WIDTH                        1  /* AGC_RAMP */
696  #define WM9090_AGC_MINGAIN_MASK                 0x003F  /* AGC_MINGAIN - [5:0] */
697  #define WM9090_AGC_MINGAIN_SHIFT                     0  /* AGC_MINGAIN - [5:0] */
698  #define WM9090_AGC_MINGAIN_WIDTH                     6  /* AGC_MINGAIN - [5:0] */
699  
700  #endif
701