Searched refs:WILC_SPI_REG_BASE (Results 1 – 2 of 2) sorted by relevance
82 #define WILC_SPI_REG_BASE 0xe800 macro83 #define WILC_SPI_CTL WILC_SPI_REG_BASE84 #define WILC_SPI_MASTER_DMA_ADDR (WILC_SPI_REG_BASE + 0x4)85 #define WILC_SPI_MASTER_DMA_COUNT (WILC_SPI_REG_BASE + 0x8)86 #define WILC_SPI_SLAVE_DMA_ADDR (WILC_SPI_REG_BASE + 0xc)87 #define WILC_SPI_SLAVE_DMA_COUNT (WILC_SPI_REG_BASE + 0x10)88 #define WILC_SPI_TX_MODE (WILC_SPI_REG_BASE + 0x20)89 #define WILC_SPI_PROTOCOL_CONFIG (WILC_SPI_REG_BASE + 0x24)90 #define WILC_SPI_INTR_CTL (WILC_SPI_REG_BASE + 0x2c)93 WILC_SPI_REG_BASE)
903 ret = spi_internal_read(wilc, 0xe840 - WILC_SPI_REG_BASE, in wilc_spi_read_size()938 return spi_internal_read(wilc, 0xe840 - WILC_SPI_REG_BASE, in wilc_spi_read_int()984 return spi_internal_write(wilc, 0xe844 - WILC_SPI_REG_BASE, in wilc_spi_clear_int_ext()
