Searched refs:VceLevel (Results 1 – 16 of 16) sorted by relevance
| /Linux-v5.4/drivers/gpu/drm/amd/powerplay/smumgr/ |
| D | vegam_smumgr.c | 1220 table->VceLevel[count].Frequency = mm_table->entries[count].eclk; in vegam_populate_smc_vce_level() 1221 table->VceLevel[count].MinVoltage = 0; in vegam_populate_smc_vce_level() 1222 table->VceLevel[count].MinVoltage |= in vegam_populate_smc_vce_level() 1234 table->VceLevel[count].MinVoltage |= in vegam_populate_smc_vce_level() 1236 table->VceLevel[count].MinVoltage |= 1 << PHASES_SHIFT; in vegam_populate_smc_vce_level() 1240 table->VceLevel[count].Frequency, ÷rs); in vegam_populate_smc_vce_level() 1245 table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in vegam_populate_smc_vce_level() 1247 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].Frequency); in vegam_populate_smc_vce_level() 1248 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].MinVoltage); in vegam_populate_smc_vce_level()
|
| D | fiji_smumgr.c | 1437 table->VceLevel[count].Frequency = mm_table->entries[count].eclk; in fiji_populate_smc_vce_level() 1438 table->VceLevel[count].MinVoltage = 0; in fiji_populate_smc_vce_level() 1439 table->VceLevel[count].MinVoltage |= in fiji_populate_smc_vce_level() 1441 table->VceLevel[count].MinVoltage |= in fiji_populate_smc_vce_level() 1444 table->VceLevel[count].MinVoltage |= 1 << PHASES_SHIFT; in fiji_populate_smc_vce_level() 1448 table->VceLevel[count].Frequency, ÷rs); in fiji_populate_smc_vce_level() 1453 table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in fiji_populate_smc_vce_level() 1455 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].Frequency); in fiji_populate_smc_vce_level() 1456 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].MinVoltage); in fiji_populate_smc_vce_level()
|
| D | polaris10_smumgr.c | 1303 table->VceLevel[count].Frequency = mm_table->entries[count].eclk; in polaris10_populate_smc_vce_level() 1304 table->VceLevel[count].MinVoltage = 0; in polaris10_populate_smc_vce_level() 1305 table->VceLevel[count].MinVoltage |= in polaris10_populate_smc_vce_level() 1317 table->VceLevel[count].MinVoltage |= in polaris10_populate_smc_vce_level() 1319 table->VceLevel[count].MinVoltage |= 1 << PHASES_SHIFT; in polaris10_populate_smc_vce_level() 1323 table->VceLevel[count].Frequency, ÷rs); in polaris10_populate_smc_vce_level() 1328 table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in polaris10_populate_smc_vce_level() 1330 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].Frequency); in polaris10_populate_smc_vce_level() 1331 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].MinVoltage); in polaris10_populate_smc_vce_level()
|
| D | tonga_smumgr.c | 1384 table->VceLevel[count].Frequency = in tonga_populate_smc_vce_level() 1386 table->VceLevel[count].MinVoltage.Vddc = in tonga_populate_smc_vce_level() 1389 table->VceLevel[count].MinVoltage.VddGfx = in tonga_populate_smc_vce_level() 1393 table->VceLevel[count].MinVoltage.Vddci = in tonga_populate_smc_vce_level() 1396 table->VceLevel[count].MinVoltage.Phases = 1; in tonga_populate_smc_vce_level() 1400 table->VceLevel[count].Frequency, ÷rs); in tonga_populate_smc_vce_level() 1405 table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in tonga_populate_smc_vce_level() 1407 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].Frequency); in tonga_populate_smc_vce_level()
|
| D | ci_smumgr.c | 1570 table->VceLevel[count].Frequency = vce_table->entries[count].evclk; in ci_populate_smc_vce_level() 1571 table->VceLevel[count].MinVoltage = in ci_populate_smc_vce_level() 1573 table->VceLevel[count].MinPhases = 1; in ci_populate_smc_vce_level() 1576 table->VceLevel[count].Frequency, ÷rs); in ci_populate_smc_vce_level() 1581 table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in ci_populate_smc_vce_level() 1583 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].Frequency); in ci_populate_smc_vce_level() 1584 CONVERT_FROM_HOST_TO_SMC_US(table->VceLevel[count].MinVoltage); in ci_populate_smc_vce_level()
|
| /Linux-v5.4/drivers/gpu/drm/radeon/ |
| D | smu7_fusion.h | 236 SMU7_Fusion_ExtClkLevel VceLevel [SMU7_MAX_LEVELS_VCE]; member
|
| D | smu7_discrete.h | 328 SMU7_Discrete_ExtClkLevel VceLevel [SMU7_MAX_LEVELS_VCE]; member
|
| D | ci_dpm.c | 2702 table->VceLevel[count].Frequency = in ci_populate_smc_vce_level() 2704 table->VceLevel[count].MinVoltage = in ci_populate_smc_vce_level() 2706 table->VceLevel[count].MinPhases = 1; in ci_populate_smc_vce_level() 2710 table->VceLevel[count].Frequency, false, ÷rs); in ci_populate_smc_vce_level() 2714 table->VceLevel[count].Divider = (u8)dividers.post_divider; in ci_populate_smc_vce_level() 2716 table->VceLevel[count].Frequency = cpu_to_be32(table->VceLevel[count].Frequency); in ci_populate_smc_vce_level() 2717 table->VceLevel[count].MinVoltage = cpu_to_be16(table->VceLevel[count].MinVoltage); in ci_populate_smc_vce_level()
|
| D | kv_dpm.c | 945 offsetof(SMU7_Fusion_DpmTable, VceLevel), in kv_populate_vce_table()
|
| /Linux-v5.4/drivers/gpu/drm/amd/powerplay/inc/ |
| D | smu7_fusion.h | 236 SMU7_Fusion_ExtClkLevel VceLevel [SMU7_MAX_LEVELS_VCE]; member
|
| D | smu7_discrete.h | 329 SMU7_Discrete_ExtClkLevel VceLevel [SMU7_MAX_LEVELS_VCE]; member
|
| D | smu72_discrete.h | 271 SMU72_Discrete_ExtClkLevel VceLevel[SMU72_MAX_LEVELS_VCE]; member
|
| D | smu73_discrete.h | 255 SMU73_Discrete_ExtClkLevel VceLevel [SMU73_MAX_LEVELS_VCE]; member
|
| D | smu74_discrete.h | 287 SMU74_Discrete_ExtClkLevel VceLevel[SMU74_MAX_LEVELS_VCE]; member
|
| D | smu75_discrete.h | 293 SMU75_Discrete_ExtClkLevel VceLevel [SMU75_MAX_LEVELS_VCE]; member
|
| /Linux-v5.4/drivers/gpu/drm/amd/amdgpu/ |
| D | kv_dpm.c | 1027 offsetof(SMU7_Fusion_DpmTable, VceLevel), in kv_populate_vce_table()
|