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Searched refs:VceBootLevel (Results 1 – 18 of 18) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/powerplay/inc/
Dsmumgr.h49 VceBootLevel, enumerator
Dsmu7_fusion.h241 uint8_t VceBootLevel; member
Dsmu7_discrete.h338 uint8_t VceBootLevel; member
Dsmu72_discrete.h280 uint8_t VceBootLevel; member
Dsmu73_discrete.h264 uint8_t VceBootLevel; member
Dsmu74_discrete.h298 uint8_t VceBootLevel; member
Dsmu75_discrete.h304 uint8_t VceBootLevel; member
/Linux-v5.4/drivers/gpu/drm/amd/powerplay/smumgr/
Dvegam_smumgr.c372 smu_data->smc_state_table.VceBootLevel = in vegam_update_vce_smc_table()
375 smu_data->smc_state_table.VceBootLevel = 0; in vegam_update_vce_smc_table()
378 offsetof(SMU75_Discrete_DpmTable, VceBootLevel); in vegam_update_vce_smc_table()
384 mm_boot_level_value |= smu_data->smc_state_table.VceBootLevel << 16; in vegam_update_vce_smc_table()
391 (uint32_t)1 << smu_data->smc_state_table.VceBootLevel); in vegam_update_vce_smc_table()
1217 table->VceBootLevel = 0; in vegam_populate_smc_vce_level()
2194 case VceBootLevel: in vegam_get_offsetof()
2195 return offsetof(SMU75_Discrete_DpmTable, VceBootLevel); in vegam_get_offsetof()
Dfiji_smumgr.c1434 table->VceBootLevel = 0; in fiji_populate_smc_vce_level()
2331 case VceBootLevel: in fiji_get_offsetof()
2332 return offsetof(SMU73_Discrete_DpmTable, VceBootLevel); in fiji_get_offsetof()
2409 smu_data->smc_state_table.VceBootLevel = in fiji_update_vce_smc_table()
2412 smu_data->smc_state_table.VceBootLevel = 0; in fiji_update_vce_smc_table()
2415 offsetof(SMU73_Discrete_DpmTable, VceBootLevel); in fiji_update_vce_smc_table()
2421 mm_boot_level_value |= smu_data->smc_state_table.VceBootLevel << 16; in fiji_update_vce_smc_table()
2428 (uint32_t)1 << smu_data->smc_state_table.VceBootLevel); in fiji_update_vce_smc_table()
Dpolaris10_smumgr.c1300 table->VceBootLevel = 0; in polaris10_populate_smc_vce_level()
2218 smu_data->smc_state_table.VceBootLevel = in polaris10_update_vce_smc_table()
2221 smu_data->smc_state_table.VceBootLevel = 0; in polaris10_update_vce_smc_table()
2224 offsetof(SMU74_Discrete_DpmTable, VceBootLevel); in polaris10_update_vce_smc_table()
2230 mm_boot_level_value |= smu_data->smc_state_table.VceBootLevel << 16; in polaris10_update_vce_smc_table()
2237 (uint32_t)1 << smu_data->smc_state_table.VceBootLevel); in polaris10_update_vce_smc_table()
2346 case VceBootLevel: in polaris10_get_offsetof()
2347 return offsetof(SMU74_Discrete_DpmTable, VceBootLevel); in polaris10_get_offsetof()
Dtonga_smumgr.c1381 table->VceBootLevel = 0; in tonga_populate_smc_vce_level()
2639 case VceBootLevel: in tonga_get_offsetof()
2640 return offsetof(SMU72_Discrete_DpmTable, VceBootLevel); in tonga_get_offsetof()
2718 smu_data->smc_state_table.VceBootLevel = in tonga_update_vce_smc_table()
2722 offsetof(SMU72_Discrete_DpmTable, VceBootLevel); in tonga_update_vce_smc_table()
2728 mm_boot_level_value |= smu_data->smc_state_table.VceBootLevel << 16; in tonga_update_vce_smc_table()
2736 (uint32_t)1 << smu_data->smc_state_table.VceBootLevel); in tonga_update_vce_smc_table()
Dci_smumgr.c1567 table->VceBootLevel = 0; in ci_populate_smc_vce_level()
2011 table->VceBootLevel = 0; in ci_init_smc_table()
2905 VceBootLevel, 0); /* temp hard code to level 0, vce can set min evclk*/ in ci_update_vce_smc_table()
/Linux-v5.4/drivers/gpu/drm/radeon/
Dsmu7_fusion.h241 uint8_t VceBootLevel; member
Dsmu7_discrete.h337 uint8_t VceBootLevel; member
Dcikd.h48 # define VceBootLevel(x) ((x) << 16) macro
Dci_dpm.c3623 table->VceBootLevel = 0; in ci_init_smc_table()
4127 pi->smc_state_table.VceBootLevel = ci_get_vce_boot_level(rdev); in ci_update_vce_dpm()
4130 tmp |= VceBootLevel(pi->smc_state_table.VceBootLevel); in ci_update_vce_dpm()
Dkv_dpm.c1495 offsetof(SMU7_Fusion_DpmTable, VceBootLevel), in kv_update_vce_dpm()
/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dkv_dpm.c1560 offsetof(SMU7_Fusion_DpmTable, VceBootLevel), in kv_update_vce_dpm()