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Searched refs:VIVS_HI_CLOCK_CONTROL (Results 1 – 4 of 4) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/etnaviv/
Detnaviv_gpu.c444 gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, clock | in etnaviv_gpu_load_clock()
446 gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, clock); in etnaviv_gpu_load_clock()
459 u32 clock = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL); in etnaviv_gpu_update_clock()
484 gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, control); in etnaviv_hw_reset()
492 gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, control); in etnaviv_hw_reset()
500 gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, control); in etnaviv_hw_reset()
504 gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, control); in etnaviv_hw_reset()
516 control = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL); in etnaviv_hw_reset()
527 gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, control); in etnaviv_hw_reset()
535 control = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL); in etnaviv_hw_reset()
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Detnaviv_perfmon.c52 u32 clock = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL); in pipe_reg_read()
59 gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, clock); in pipe_reg_read()
67 gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, clock); in pipe_reg_read()
Detnaviv_dump.c29 VIVS_HI_CLOCK_CONTROL,
Dstate_hi.xml.h53 #define VIVS_HI_CLOCK_CONTROL 0x00000000 macro