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Searched refs:UVD_MASTINT_EN__VCPU_EN_MASK (Results 1 – 13 of 13) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Duvd_v7_0.c849 ~UVD_MASTINT_EN__VCPU_EN_MASK, 0); in uvd_v7_0_sriov_start()
886 ~(UVD_MASTINT_EN__VCPU_EN_MASK|UVD_MASTINT_EN__SYS_EN_MASK), in uvd_v7_0_sriov_start()
887 (UVD_MASTINT_EN__VCPU_EN_MASK|UVD_MASTINT_EN__SYS_EN_MASK)); in uvd_v7_0_sriov_start()
962 ~UVD_MASTINT_EN__VCPU_EN_MASK); in uvd_v7_0_start()
1053 (UVD_MASTINT_EN__VCPU_EN_MASK|UVD_MASTINT_EN__SYS_EN_MASK), in uvd_v7_0_start()
1054 ~(UVD_MASTINT_EN__VCPU_EN_MASK|UVD_MASTINT_EN__SYS_EN_MASK)); in uvd_v7_0_start()
Dvcn_v1_0.c802 ~UVD_MASTINT_EN__VCPU_EN_MASK); in vcn_v1_0_start_spg_mode()
892 UVD_MASTINT_EN__VCPU_EN_MASK, ~UVD_MASTINT_EN__VCPU_EN_MASK); in vcn_v1_0_start_spg_mode()
999 0, UVD_MASTINT_EN__VCPU_EN_MASK, 0); in vcn_v1_0_start_dpg_mode()
1053 UVD_MASTINT_EN__VCPU_EN_MASK, UVD_MASTINT_EN__VCPU_EN_MASK, 0); in vcn_v1_0_start_dpg_mode()
Dvcn_v2_5.c743 ~UVD_MASTINT_EN__VCPU_EN_MASK); in vcn_v2_5_start()
838 UVD_MASTINT_EN__VCPU_EN_MASK, in vcn_v2_5_start()
839 ~UVD_MASTINT_EN__VCPU_EN_MASK); in vcn_v2_5_start()
Dvcn_v2_0.c1013 UVD_MASTINT_EN__VCPU_EN_MASK, 0, indirect); in vcn_v2_0_start_dpg_mode()
1086 ~UVD_MASTINT_EN__VCPU_EN_MASK); in vcn_v2_0_start()
1176 UVD_MASTINT_EN__VCPU_EN_MASK, in vcn_v2_0_start()
1177 ~UVD_MASTINT_EN__VCPU_EN_MASK); in vcn_v2_0_start()
Duvd_v6_0.c804 (UVD_MASTINT_EN__VCPU_EN_MASK|UVD_MASTINT_EN__SYS_EN_MASK), in uvd_v6_0_start()
805 ~(UVD_MASTINT_EN__VCPU_EN_MASK|UVD_MASTINT_EN__SYS_EN_MASK)); in uvd_v6_0_start()
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h490 #define UVD_MASTINT_EN__VCPU_EN_MASK … macro
Duvd_4_0_sh_mask.h426 #define UVD_MASTINT_EN__VCPU_EN_MASK 0x00000002L macro
Duvd_4_2_sh_mask.h327 #define UVD_MASTINT_EN__VCPU_EN_MASK 0x2 macro
Duvd_5_0_sh_mask.h359 #define UVD_MASTINT_EN__VCPU_EN_MASK 0x2 macro
Duvd_6_0_sh_mask.h361 #define UVD_MASTINT_EN__VCPU_EN_MASK 0x2 macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h1009 #define UVD_MASTINT_EN__VCPU_EN_MASK … macro
Dvcn_2_5_sh_mask.h2342 #define UVD_MASTINT_EN__VCPU_EN_MASK … macro
Dvcn_2_0_0_sh_mask.h2089 #define UVD_MASTINT_EN__VCPU_EN_MASK … macro