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Searched refs:UVD_CGC_CTRL__UDEC_RE_MODE_MASK (Results 1 – 14 of 14) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h444 #define UVD_CGC_CTRL__UDEC_RE_MODE_MASK macro
Duvd_4_0_sh_mask.h72 #define UVD_CGC_CTRL__UDEC_RE_MODE_MASK 0x00000800L macro
Duvd_4_2_sh_mask.h227 #define UVD_CGC_CTRL__UDEC_RE_MODE_MASK 0x800 macro
Duvd_5_0_sh_mask.h249 #define UVD_CGC_CTRL__UDEC_RE_MODE_MASK 0x800 macro
Duvd_6_0_sh_mask.h251 #define UVD_CGC_CTRL__UDEC_RE_MODE_MASK 0x800 macro
/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Duvd_v5_0.c664 data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK | in uvd_v5_0_set_sw_clock_gating()
Dvcn_v2_5.c476 data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK in vcn_v2_5_disable_clock_gating()
568 data |= (UVD_CGC_CTRL__UDEC_RE_MODE_MASK in vcn_v2_5_enable_clock_gating()
Dvcn_v2_0.c547 data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK in vcn_v2_0_disable_clock_gating()
623 reg_data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK | in vcn_v2_0_clock_gating_dpg_mode()
805 data |= (UVD_CGC_CTRL__UDEC_RE_MODE_MASK in vcn_v2_0_enable_clock_gating()
Dvcn_v1_0.c496 data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK in vcn_v1_0_disable_clock_gating()
597 data |= (UVD_CGC_CTRL__UDEC_RE_MODE_MASK in vcn_v1_0_enable_clock_gating()
655 reg_data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK | in vcn_v1_0_clock_gating_dpg_mode()
Duvd_v6_0.c1319 data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK | in uvd_v6_0_set_sw_clock_gating()
Duvd_v7_0.c1602 data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK |
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h937 #define UVD_CGC_CTRL__UDEC_RE_MODE_MASK macro
Dvcn_2_5_sh_mask.h2005 #define UVD_CGC_CTRL__UDEC_RE_MODE_MASK macro
Dvcn_2_0_0_sh_mask.h1956 #define UVD_CGC_CTRL__UDEC_RE_MODE_MASK macro