1 /*
2  * Universal Flash Storage Host controller driver
3  *
4  * This code is based on drivers/scsi/ufs/ufs.h
5  * Copyright (C) 2011-2013 Samsung India Software Operations
6  *
7  * Authors:
8  *	Santosh Yaraganavi <santosh.sy@samsung.com>
9  *	Vinayak Holikatti <h.vinayak@samsung.com>
10  *
11  * This program is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU General Public License
13  * as published by the Free Software Foundation; either version 2
14  * of the License, or (at your option) any later version.
15  * See the COPYING file in the top-level directory or visit
16  * <http://www.gnu.org/licenses/gpl-2.0.html>
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
21  * GNU General Public License for more details.
22  *
23  * This program is provided "AS IS" and "WITH ALL FAULTS" and
24  * without warranty of any kind. You are solely responsible for
25  * determining the appropriateness of using and distributing
26  * the program and assume all risks associated with your exercise
27  * of rights with respect to the program, including but not limited
28  * to infringement of third party rights, the risks and costs of
29  * program errors, damage to or loss of data, programs or equipment,
30  * and unavailability or interruption of operations. Under no
31  * circumstances will the contributor of this Program be liable for
32  * any damages of any kind arising from your use or distribution of
33  * this program.
34  */
35 
36 #ifndef _UFS_H
37 #define _UFS_H
38 
39 #include <linux/mutex.h>
40 #include <linux/types.h>
41 #include <uapi/scsi/scsi_bsg_ufs.h>
42 
43 #define GENERAL_UPIU_REQUEST_SIZE (sizeof(struct utp_upiu_req))
44 #define QUERY_DESC_MAX_SIZE       255
45 #define QUERY_DESC_MIN_SIZE       2
46 #define QUERY_DESC_HDR_SIZE       2
47 #define QUERY_OSF_SIZE            (GENERAL_UPIU_REQUEST_SIZE - \
48 					(sizeof(struct utp_upiu_header)))
49 #define UFS_SENSE_SIZE	18
50 
51 #define UPIU_HEADER_DWORD(byte3, byte2, byte1, byte0)\
52 			cpu_to_be32((byte3 << 24) | (byte2 << 16) |\
53 			 (byte1 << 8) | (byte0))
54 /*
55  * UFS device may have standard LUs and LUN id could be from 0x00 to
56  * 0x7F. Standard LUs use "Peripheral Device Addressing Format".
57  * UFS device may also have the Well Known LUs (also referred as W-LU)
58  * which again could be from 0x00 to 0x7F. For W-LUs, device only use
59  * the "Extended Addressing Format" which means the W-LUNs would be
60  * from 0xc100 (SCSI_W_LUN_BASE) onwards.
61  * This means max. LUN number reported from UFS device could be 0xC17F.
62  */
63 #define UFS_UPIU_MAX_UNIT_NUM_ID	0x7F
64 #define UFS_MAX_LUNS		(SCSI_W_LUN_BASE + UFS_UPIU_MAX_UNIT_NUM_ID)
65 #define UFS_UPIU_WLUN_ID	(1 << 7)
66 #define UFS_UPIU_MAX_GENERAL_LUN	8
67 
68 /* Well known logical unit id in LUN field of UPIU */
69 enum {
70 	UFS_UPIU_REPORT_LUNS_WLUN	= 0x81,
71 	UFS_UPIU_UFS_DEVICE_WLUN	= 0xD0,
72 	UFS_UPIU_BOOT_WLUN		= 0xB0,
73 	UFS_UPIU_RPMB_WLUN		= 0xC4,
74 };
75 
76 /*
77  * UFS Protocol Information Unit related definitions
78  */
79 
80 /* Task management functions */
81 enum {
82 	UFS_ABORT_TASK		= 0x01,
83 	UFS_ABORT_TASK_SET	= 0x02,
84 	UFS_CLEAR_TASK_SET	= 0x04,
85 	UFS_LOGICAL_RESET	= 0x08,
86 	UFS_QUERY_TASK		= 0x80,
87 	UFS_QUERY_TASK_SET	= 0x81,
88 };
89 
90 /* UTP UPIU Transaction Codes Initiator to Target */
91 enum {
92 	UPIU_TRANSACTION_NOP_OUT	= 0x00,
93 	UPIU_TRANSACTION_COMMAND	= 0x01,
94 	UPIU_TRANSACTION_DATA_OUT	= 0x02,
95 	UPIU_TRANSACTION_TASK_REQ	= 0x04,
96 	UPIU_TRANSACTION_QUERY_REQ	= 0x16,
97 };
98 
99 /* UTP UPIU Transaction Codes Target to Initiator */
100 enum {
101 	UPIU_TRANSACTION_NOP_IN		= 0x20,
102 	UPIU_TRANSACTION_RESPONSE	= 0x21,
103 	UPIU_TRANSACTION_DATA_IN	= 0x22,
104 	UPIU_TRANSACTION_TASK_RSP	= 0x24,
105 	UPIU_TRANSACTION_READY_XFER	= 0x31,
106 	UPIU_TRANSACTION_QUERY_RSP	= 0x36,
107 	UPIU_TRANSACTION_REJECT_UPIU	= 0x3F,
108 };
109 
110 /* UPIU Read/Write flags */
111 enum {
112 	UPIU_CMD_FLAGS_NONE	= 0x00,
113 	UPIU_CMD_FLAGS_WRITE	= 0x20,
114 	UPIU_CMD_FLAGS_READ	= 0x40,
115 };
116 
117 /* UPIU Task Attributes */
118 enum {
119 	UPIU_TASK_ATTR_SIMPLE	= 0x00,
120 	UPIU_TASK_ATTR_ORDERED	= 0x01,
121 	UPIU_TASK_ATTR_HEADQ	= 0x02,
122 	UPIU_TASK_ATTR_ACA	= 0x03,
123 };
124 
125 /* UPIU Query request function */
126 enum {
127 	UPIU_QUERY_FUNC_STANDARD_READ_REQUEST           = 0x01,
128 	UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST          = 0x81,
129 };
130 
131 /* Flag idn for Query Requests*/
132 enum flag_idn {
133 	QUERY_FLAG_IDN_FDEVICEINIT			= 0x01,
134 	QUERY_FLAG_IDN_PERMANENT_WPE			= 0x02,
135 	QUERY_FLAG_IDN_PWR_ON_WPE			= 0x03,
136 	QUERY_FLAG_IDN_BKOPS_EN				= 0x04,
137 	QUERY_FLAG_IDN_LIFE_SPAN_MODE_ENABLE		= 0x05,
138 	QUERY_FLAG_IDN_PURGE_ENABLE			= 0x06,
139 	QUERY_FLAG_IDN_RESERVED2			= 0x07,
140 	QUERY_FLAG_IDN_FPHYRESOURCEREMOVAL		= 0x08,
141 	QUERY_FLAG_IDN_BUSY_RTC				= 0x09,
142 	QUERY_FLAG_IDN_RESERVED3			= 0x0A,
143 	QUERY_FLAG_IDN_PERMANENTLY_DISABLE_FW_UPDATE	= 0x0B,
144 };
145 
146 /* Attribute idn for Query requests */
147 enum attr_idn {
148 	QUERY_ATTR_IDN_BOOT_LU_EN		= 0x00,
149 	QUERY_ATTR_IDN_RESERVED			= 0x01,
150 	QUERY_ATTR_IDN_POWER_MODE		= 0x02,
151 	QUERY_ATTR_IDN_ACTIVE_ICC_LVL		= 0x03,
152 	QUERY_ATTR_IDN_OOO_DATA_EN		= 0x04,
153 	QUERY_ATTR_IDN_BKOPS_STATUS		= 0x05,
154 	QUERY_ATTR_IDN_PURGE_STATUS		= 0x06,
155 	QUERY_ATTR_IDN_MAX_DATA_IN		= 0x07,
156 	QUERY_ATTR_IDN_MAX_DATA_OUT		= 0x08,
157 	QUERY_ATTR_IDN_DYN_CAP_NEEDED		= 0x09,
158 	QUERY_ATTR_IDN_REF_CLK_FREQ		= 0x0A,
159 	QUERY_ATTR_IDN_CONF_DESC_LOCK		= 0x0B,
160 	QUERY_ATTR_IDN_MAX_NUM_OF_RTT		= 0x0C,
161 	QUERY_ATTR_IDN_EE_CONTROL		= 0x0D,
162 	QUERY_ATTR_IDN_EE_STATUS		= 0x0E,
163 	QUERY_ATTR_IDN_SECONDS_PASSED		= 0x0F,
164 	QUERY_ATTR_IDN_CNTX_CONF		= 0x10,
165 	QUERY_ATTR_IDN_CORR_PRG_BLK_NUM		= 0x11,
166 	QUERY_ATTR_IDN_RESERVED2		= 0x12,
167 	QUERY_ATTR_IDN_RESERVED3		= 0x13,
168 	QUERY_ATTR_IDN_FFU_STATUS		= 0x14,
169 	QUERY_ATTR_IDN_PSA_STATE		= 0x15,
170 	QUERY_ATTR_IDN_PSA_DATA_SIZE		= 0x16,
171 };
172 
173 /* Descriptor idn for Query requests */
174 enum desc_idn {
175 	QUERY_DESC_IDN_DEVICE		= 0x0,
176 	QUERY_DESC_IDN_CONFIGURATION	= 0x1,
177 	QUERY_DESC_IDN_UNIT		= 0x2,
178 	QUERY_DESC_IDN_RFU_0		= 0x3,
179 	QUERY_DESC_IDN_INTERCONNECT	= 0x4,
180 	QUERY_DESC_IDN_STRING		= 0x5,
181 	QUERY_DESC_IDN_RFU_1		= 0x6,
182 	QUERY_DESC_IDN_GEOMETRY		= 0x7,
183 	QUERY_DESC_IDN_POWER		= 0x8,
184 	QUERY_DESC_IDN_HEALTH           = 0x9,
185 	QUERY_DESC_IDN_MAX,
186 };
187 
188 enum desc_header_offset {
189 	QUERY_DESC_LENGTH_OFFSET	= 0x00,
190 	QUERY_DESC_DESC_TYPE_OFFSET	= 0x01,
191 };
192 
193 enum ufs_desc_def_size {
194 	QUERY_DESC_DEVICE_DEF_SIZE		= 0x40,
195 	QUERY_DESC_CONFIGURATION_DEF_SIZE	= 0x90,
196 	QUERY_DESC_UNIT_DEF_SIZE		= 0x23,
197 	QUERY_DESC_INTERCONNECT_DEF_SIZE	= 0x06,
198 	QUERY_DESC_GEOMETRY_DEF_SIZE		= 0x48,
199 	QUERY_DESC_POWER_DEF_SIZE		= 0x62,
200 	QUERY_DESC_HEALTH_DEF_SIZE		= 0x25,
201 };
202 
203 /* Unit descriptor parameters offsets in bytes*/
204 enum unit_desc_param {
205 	UNIT_DESC_PARAM_LEN			= 0x0,
206 	UNIT_DESC_PARAM_TYPE			= 0x1,
207 	UNIT_DESC_PARAM_UNIT_INDEX		= 0x2,
208 	UNIT_DESC_PARAM_LU_ENABLE		= 0x3,
209 	UNIT_DESC_PARAM_BOOT_LUN_ID		= 0x4,
210 	UNIT_DESC_PARAM_LU_WR_PROTECT		= 0x5,
211 	UNIT_DESC_PARAM_LU_Q_DEPTH		= 0x6,
212 	UNIT_DESC_PARAM_PSA_SENSITIVE		= 0x7,
213 	UNIT_DESC_PARAM_MEM_TYPE		= 0x8,
214 	UNIT_DESC_PARAM_DATA_RELIABILITY	= 0x9,
215 	UNIT_DESC_PARAM_LOGICAL_BLK_SIZE	= 0xA,
216 	UNIT_DESC_PARAM_LOGICAL_BLK_COUNT	= 0xB,
217 	UNIT_DESC_PARAM_ERASE_BLK_SIZE		= 0x13,
218 	UNIT_DESC_PARAM_PROVISIONING_TYPE	= 0x17,
219 	UNIT_DESC_PARAM_PHY_MEM_RSRC_CNT	= 0x18,
220 	UNIT_DESC_PARAM_CTX_CAPABILITIES	= 0x20,
221 	UNIT_DESC_PARAM_LARGE_UNIT_SIZE_M1	= 0x22,
222 };
223 
224 /* Device descriptor parameters offsets in bytes*/
225 enum device_desc_param {
226 	DEVICE_DESC_PARAM_LEN			= 0x0,
227 	DEVICE_DESC_PARAM_TYPE			= 0x1,
228 	DEVICE_DESC_PARAM_DEVICE_TYPE		= 0x2,
229 	DEVICE_DESC_PARAM_DEVICE_CLASS		= 0x3,
230 	DEVICE_DESC_PARAM_DEVICE_SUB_CLASS	= 0x4,
231 	DEVICE_DESC_PARAM_PRTCL			= 0x5,
232 	DEVICE_DESC_PARAM_NUM_LU		= 0x6,
233 	DEVICE_DESC_PARAM_NUM_WLU		= 0x7,
234 	DEVICE_DESC_PARAM_BOOT_ENBL		= 0x8,
235 	DEVICE_DESC_PARAM_DESC_ACCSS_ENBL	= 0x9,
236 	DEVICE_DESC_PARAM_INIT_PWR_MODE		= 0xA,
237 	DEVICE_DESC_PARAM_HIGH_PR_LUN		= 0xB,
238 	DEVICE_DESC_PARAM_SEC_RMV_TYPE		= 0xC,
239 	DEVICE_DESC_PARAM_SEC_LU		= 0xD,
240 	DEVICE_DESC_PARAM_BKOP_TERM_LT		= 0xE,
241 	DEVICE_DESC_PARAM_ACTVE_ICC_LVL		= 0xF,
242 	DEVICE_DESC_PARAM_SPEC_VER		= 0x10,
243 	DEVICE_DESC_PARAM_MANF_DATE		= 0x12,
244 	DEVICE_DESC_PARAM_MANF_NAME		= 0x14,
245 	DEVICE_DESC_PARAM_PRDCT_NAME		= 0x15,
246 	DEVICE_DESC_PARAM_SN			= 0x16,
247 	DEVICE_DESC_PARAM_OEM_ID		= 0x17,
248 	DEVICE_DESC_PARAM_MANF_ID		= 0x18,
249 	DEVICE_DESC_PARAM_UD_OFFSET		= 0x1A,
250 	DEVICE_DESC_PARAM_UD_LEN		= 0x1B,
251 	DEVICE_DESC_PARAM_RTT_CAP		= 0x1C,
252 	DEVICE_DESC_PARAM_FRQ_RTC		= 0x1D,
253 	DEVICE_DESC_PARAM_UFS_FEAT		= 0x1F,
254 	DEVICE_DESC_PARAM_FFU_TMT		= 0x20,
255 	DEVICE_DESC_PARAM_Q_DPTH		= 0x21,
256 	DEVICE_DESC_PARAM_DEV_VER		= 0x22,
257 	DEVICE_DESC_PARAM_NUM_SEC_WPA		= 0x24,
258 	DEVICE_DESC_PARAM_PSA_MAX_DATA		= 0x25,
259 	DEVICE_DESC_PARAM_PSA_TMT		= 0x29,
260 	DEVICE_DESC_PARAM_PRDCT_REV		= 0x2A,
261 };
262 
263 /* Interconnect descriptor parameters offsets in bytes*/
264 enum interconnect_desc_param {
265 	INTERCONNECT_DESC_PARAM_LEN		= 0x0,
266 	INTERCONNECT_DESC_PARAM_TYPE		= 0x1,
267 	INTERCONNECT_DESC_PARAM_UNIPRO_VER	= 0x2,
268 	INTERCONNECT_DESC_PARAM_MPHY_VER	= 0x4,
269 };
270 
271 /* Geometry descriptor parameters offsets in bytes*/
272 enum geometry_desc_param {
273 	GEOMETRY_DESC_PARAM_LEN			= 0x0,
274 	GEOMETRY_DESC_PARAM_TYPE		= 0x1,
275 	GEOMETRY_DESC_PARAM_DEV_CAP		= 0x4,
276 	GEOMETRY_DESC_PARAM_MAX_NUM_LUN		= 0xC,
277 	GEOMETRY_DESC_PARAM_SEG_SIZE		= 0xD,
278 	GEOMETRY_DESC_PARAM_ALLOC_UNIT_SIZE	= 0x11,
279 	GEOMETRY_DESC_PARAM_MIN_BLK_SIZE	= 0x12,
280 	GEOMETRY_DESC_PARAM_OPT_RD_BLK_SIZE	= 0x13,
281 	GEOMETRY_DESC_PARAM_OPT_WR_BLK_SIZE	= 0x14,
282 	GEOMETRY_DESC_PARAM_MAX_IN_BUF_SIZE	= 0x15,
283 	GEOMETRY_DESC_PARAM_MAX_OUT_BUF_SIZE	= 0x16,
284 	GEOMETRY_DESC_PARAM_RPMB_RW_SIZE	= 0x17,
285 	GEOMETRY_DESC_PARAM_DYN_CAP_RSRC_PLC	= 0x18,
286 	GEOMETRY_DESC_PARAM_DATA_ORDER		= 0x19,
287 	GEOMETRY_DESC_PARAM_MAX_NUM_CTX		= 0x1A,
288 	GEOMETRY_DESC_PARAM_TAG_UNIT_SIZE	= 0x1B,
289 	GEOMETRY_DESC_PARAM_TAG_RSRC_SIZE	= 0x1C,
290 	GEOMETRY_DESC_PARAM_SEC_RM_TYPES	= 0x1D,
291 	GEOMETRY_DESC_PARAM_MEM_TYPES		= 0x1E,
292 	GEOMETRY_DESC_PARAM_SCM_MAX_NUM_UNITS	= 0x20,
293 	GEOMETRY_DESC_PARAM_SCM_CAP_ADJ_FCTR	= 0x24,
294 	GEOMETRY_DESC_PARAM_NPM_MAX_NUM_UNITS	= 0x26,
295 	GEOMETRY_DESC_PARAM_NPM_CAP_ADJ_FCTR	= 0x2A,
296 	GEOMETRY_DESC_PARAM_ENM1_MAX_NUM_UNITS	= 0x2C,
297 	GEOMETRY_DESC_PARAM_ENM1_CAP_ADJ_FCTR	= 0x30,
298 	GEOMETRY_DESC_PARAM_ENM2_MAX_NUM_UNITS	= 0x32,
299 	GEOMETRY_DESC_PARAM_ENM2_CAP_ADJ_FCTR	= 0x36,
300 	GEOMETRY_DESC_PARAM_ENM3_MAX_NUM_UNITS	= 0x38,
301 	GEOMETRY_DESC_PARAM_ENM3_CAP_ADJ_FCTR	= 0x3C,
302 	GEOMETRY_DESC_PARAM_ENM4_MAX_NUM_UNITS	= 0x3E,
303 	GEOMETRY_DESC_PARAM_ENM4_CAP_ADJ_FCTR	= 0x42,
304 	GEOMETRY_DESC_PARAM_OPT_LOG_BLK_SIZE	= 0x44,
305 };
306 
307 /* Health descriptor parameters offsets in bytes*/
308 enum health_desc_param {
309 	HEALTH_DESC_PARAM_LEN			= 0x0,
310 	HEALTH_DESC_PARAM_TYPE			= 0x1,
311 	HEALTH_DESC_PARAM_EOL_INFO		= 0x2,
312 	HEALTH_DESC_PARAM_LIFE_TIME_EST_A	= 0x3,
313 	HEALTH_DESC_PARAM_LIFE_TIME_EST_B	= 0x4,
314 };
315 
316 /*
317  * Logical Unit Write Protect
318  * 00h: LU not write protected
319  * 01h: LU write protected when fPowerOnWPEn =1
320  * 02h: LU permanently write protected when fPermanentWPEn =1
321  */
322 enum ufs_lu_wp_type {
323 	UFS_LU_NO_WP		= 0x00,
324 	UFS_LU_POWER_ON_WP	= 0x01,
325 	UFS_LU_PERM_WP		= 0x02,
326 };
327 
328 /* bActiveICCLevel parameter current units */
329 enum {
330 	UFSHCD_NANO_AMP		= 0,
331 	UFSHCD_MICRO_AMP	= 1,
332 	UFSHCD_MILI_AMP		= 2,
333 	UFSHCD_AMP		= 3,
334 };
335 
336 #define POWER_DESC_MAX_SIZE			0x62
337 #define POWER_DESC_MAX_ACTV_ICC_LVLS		16
338 
339 /* Attribute  bActiveICCLevel parameter bit masks definitions */
340 #define ATTR_ICC_LVL_UNIT_OFFSET	14
341 #define ATTR_ICC_LVL_UNIT_MASK		(0x3 << ATTR_ICC_LVL_UNIT_OFFSET)
342 #define ATTR_ICC_LVL_VALUE_MASK		0x3FF
343 
344 /* Power descriptor parameters offsets in bytes */
345 enum power_desc_param_offset {
346 	PWR_DESC_LEN			= 0x0,
347 	PWR_DESC_TYPE			= 0x1,
348 	PWR_DESC_ACTIVE_LVLS_VCC_0	= 0x2,
349 	PWR_DESC_ACTIVE_LVLS_VCCQ_0	= 0x22,
350 	PWR_DESC_ACTIVE_LVLS_VCCQ2_0	= 0x42,
351 };
352 
353 /* Exception event mask values */
354 enum {
355 	MASK_EE_STATUS		= 0xFFFF,
356 	MASK_EE_URGENT_BKOPS	= (1 << 2),
357 };
358 
359 /* Background operation status */
360 enum bkops_status {
361 	BKOPS_STATUS_NO_OP               = 0x0,
362 	BKOPS_STATUS_NON_CRITICAL        = 0x1,
363 	BKOPS_STATUS_PERF_IMPACT         = 0x2,
364 	BKOPS_STATUS_CRITICAL            = 0x3,
365 	BKOPS_STATUS_MAX		 = BKOPS_STATUS_CRITICAL,
366 };
367 
368 /* UTP QUERY Transaction Specific Fields OpCode */
369 enum query_opcode {
370 	UPIU_QUERY_OPCODE_NOP		= 0x0,
371 	UPIU_QUERY_OPCODE_READ_DESC	= 0x1,
372 	UPIU_QUERY_OPCODE_WRITE_DESC	= 0x2,
373 	UPIU_QUERY_OPCODE_READ_ATTR	= 0x3,
374 	UPIU_QUERY_OPCODE_WRITE_ATTR	= 0x4,
375 	UPIU_QUERY_OPCODE_READ_FLAG	= 0x5,
376 	UPIU_QUERY_OPCODE_SET_FLAG	= 0x6,
377 	UPIU_QUERY_OPCODE_CLEAR_FLAG	= 0x7,
378 	UPIU_QUERY_OPCODE_TOGGLE_FLAG	= 0x8,
379 };
380 
381 /* bRefClkFreq attribute values */
382 enum ufs_ref_clk_freq {
383 	REF_CLK_FREQ_19_2_MHZ	= 0,
384 	REF_CLK_FREQ_26_MHZ	= 1,
385 	REF_CLK_FREQ_38_4_MHZ	= 2,
386 	REF_CLK_FREQ_52_MHZ	= 3,
387 	REF_CLK_FREQ_INVAL	= -1,
388 };
389 
390 struct ufs_ref_clk {
391 	unsigned long freq_hz;
392 	enum ufs_ref_clk_freq val;
393 };
394 
395 /* Query response result code */
396 enum {
397 	QUERY_RESULT_SUCCESS                    = 0x00,
398 	QUERY_RESULT_NOT_READABLE               = 0xF6,
399 	QUERY_RESULT_NOT_WRITEABLE              = 0xF7,
400 	QUERY_RESULT_ALREADY_WRITTEN            = 0xF8,
401 	QUERY_RESULT_INVALID_LENGTH             = 0xF9,
402 	QUERY_RESULT_INVALID_VALUE              = 0xFA,
403 	QUERY_RESULT_INVALID_SELECTOR           = 0xFB,
404 	QUERY_RESULT_INVALID_INDEX              = 0xFC,
405 	QUERY_RESULT_INVALID_IDN                = 0xFD,
406 	QUERY_RESULT_INVALID_OPCODE             = 0xFE,
407 	QUERY_RESULT_GENERAL_FAILURE            = 0xFF,
408 };
409 
410 /* UTP Transfer Request Command Type (CT) */
411 enum {
412 	UPIU_COMMAND_SET_TYPE_SCSI	= 0x0,
413 	UPIU_COMMAND_SET_TYPE_UFS	= 0x1,
414 	UPIU_COMMAND_SET_TYPE_QUERY	= 0x2,
415 };
416 
417 /* UTP Transfer Request Command Offset */
418 #define UPIU_COMMAND_TYPE_OFFSET	28
419 
420 /* Offset of the response code in the UPIU header */
421 #define UPIU_RSP_CODE_OFFSET		8
422 
423 enum {
424 	MASK_SCSI_STATUS		= 0xFF,
425 	MASK_TASK_RESPONSE              = 0xFF00,
426 	MASK_RSP_UPIU_RESULT            = 0xFFFF,
427 	MASK_QUERY_DATA_SEG_LEN         = 0xFFFF,
428 	MASK_RSP_UPIU_DATA_SEG_LEN	= 0xFFFF,
429 	MASK_RSP_EXCEPTION_EVENT        = 0x10000,
430 	MASK_TM_SERVICE_RESP		= 0xFF,
431 	MASK_TM_FUNC			= 0xFF,
432 };
433 
434 /* Task management service response */
435 enum {
436 	UPIU_TASK_MANAGEMENT_FUNC_COMPL		= 0x00,
437 	UPIU_TASK_MANAGEMENT_FUNC_NOT_SUPPORTED = 0x04,
438 	UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED	= 0x08,
439 	UPIU_TASK_MANAGEMENT_FUNC_FAILED	= 0x05,
440 	UPIU_INCORRECT_LOGICAL_UNIT_NO		= 0x09,
441 };
442 
443 /* UFS device power modes */
444 enum ufs_dev_pwr_mode {
445 	UFS_ACTIVE_PWR_MODE	= 1,
446 	UFS_SLEEP_PWR_MODE	= 2,
447 	UFS_POWERDOWN_PWR_MODE	= 3,
448 };
449 
450 /**
451  * struct utp_cmd_rsp - Response UPIU structure
452  * @residual_transfer_count: Residual transfer count DW-3
453  * @reserved: Reserved double words DW-4 to DW-7
454  * @sense_data_len: Sense data length DW-8 U16
455  * @sense_data: Sense data field DW-8 to DW-12
456  */
457 struct utp_cmd_rsp {
458 	__be32 residual_transfer_count;
459 	__be32 reserved[4];
460 	__be16 sense_data_len;
461 	u8 sense_data[UFS_SENSE_SIZE];
462 };
463 
464 /**
465  * struct utp_upiu_rsp - general upiu response structure
466  * @header: UPIU header structure DW-0 to DW-2
467  * @sr: fields structure for scsi command DW-3 to DW-12
468  * @qr: fields structure for query request DW-3 to DW-7
469  */
470 struct utp_upiu_rsp {
471 	struct utp_upiu_header header;
472 	union {
473 		struct utp_cmd_rsp sr;
474 		struct utp_upiu_query qr;
475 	};
476 };
477 
478 /**
479  * struct ufs_query_req - parameters for building a query request
480  * @query_func: UPIU header query function
481  * @upiu_req: the query request data
482  */
483 struct ufs_query_req {
484 	u8 query_func;
485 	struct utp_upiu_query upiu_req;
486 };
487 
488 /**
489  * struct ufs_query_resp - UPIU QUERY
490  * @response: device response code
491  * @upiu_res: query response data
492  */
493 struct ufs_query_res {
494 	u8 response;
495 	struct utp_upiu_query upiu_res;
496 };
497 
498 #define UFS_VREG_VCC_MIN_UV	   2700000 /* uV */
499 #define UFS_VREG_VCC_MAX_UV	   3600000 /* uV */
500 #define UFS_VREG_VCC_1P8_MIN_UV    1700000 /* uV */
501 #define UFS_VREG_VCC_1P8_MAX_UV    1950000 /* uV */
502 #define UFS_VREG_VCCQ_MIN_UV	   1100000 /* uV */
503 #define UFS_VREG_VCCQ_MAX_UV	   1300000 /* uV */
504 #define UFS_VREG_VCCQ2_MIN_UV	   1650000 /* uV */
505 #define UFS_VREG_VCCQ2_MAX_UV	   1950000 /* uV */
506 
507 /*
508  * VCCQ & VCCQ2 current requirement when UFS device is in sleep state
509  * and link is in Hibern8 state.
510  */
511 #define UFS_VREG_LPM_LOAD_UA	1000 /* uA */
512 
513 struct ufs_vreg {
514 	struct regulator *reg;
515 	const char *name;
516 	bool enabled;
517 	int min_uV;
518 	int max_uV;
519 	int max_uA;
520 };
521 
522 struct ufs_vreg_info {
523 	struct ufs_vreg *vcc;
524 	struct ufs_vreg *vccq;
525 	struct ufs_vreg *vccq2;
526 	struct ufs_vreg *vdd_hba;
527 };
528 
529 struct ufs_dev_info {
530 	bool f_power_on_wp_en;
531 	/* Keeps information if any of the LU is power on write protected */
532 	bool is_lu_power_on_wp;
533 };
534 
535 #define MAX_MODEL_LEN 16
536 /**
537  * ufs_dev_desc - ufs device details from the device descriptor
538  *
539  * @wmanufacturerid: card details
540  * @model: card model
541  */
542 struct ufs_dev_desc {
543 	u16 wmanufacturerid;
544 	u8 *model;
545 };
546 
547 /**
548  * ufs_is_valid_unit_desc_lun - checks if the given LUN has a unit descriptor
549  * @lun: LU number to check
550  * @return: true if the lun has a matching unit descriptor, false otherwise
551  */
ufs_is_valid_unit_desc_lun(u8 lun)552 static inline bool ufs_is_valid_unit_desc_lun(u8 lun)
553 {
554 	return lun == UFS_UPIU_RPMB_WLUN || (lun < UFS_UPIU_MAX_GENERAL_LUN);
555 }
556 
557 #endif /* End of Header */
558