Searched refs:TG3_PCIE_TLDLPL_PORT (Results 1 – 2 of 2) sorted by relevance
2069 #define TG3_PCIE_TLDLPL_PORT 0x00007c00 macro
6468 for (i = 0; i < TG3_PCIE_TLDLPL_PORT; i += sizeof(u32)) in tg3_dump_state()9950 val = tr32(TG3_PCIE_TLDLPL_PORT + TG3_PCIE_PL_LO_PHYCTL1); in tg3_reset_hw()9951 tw32(TG3_PCIE_TLDLPL_PORT + TG3_PCIE_PL_LO_PHYCTL1, in tg3_reset_hw()9965 val = tr32(TG3_PCIE_TLDLPL_PORT + in tg3_reset_hw()9967 tw32(TG3_PCIE_TLDLPL_PORT + TG3_PCIE_PL_LO_PHYCTL5, in tg3_reset_hw()9987 val = tr32(TG3_PCIE_TLDLPL_PORT + in tg3_reset_hw()9990 tw32(TG3_PCIE_TLDLPL_PORT + TG3_PCIE_DL_LO_FTSMAX, in tg3_reset_hw()
