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Searched refs:TEGRA_DIVIDER_INT (Results 1 – 5 of 5) sorted by relevance

/Linux-v5.4/drivers/clk/tegra/
Dclk-utils.c23 if (!(flags & TEGRA_DIVIDER_INT)) in div_frac_get()
31 if (flags & TEGRA_DIVIDER_INT) in div_frac_get()
Dclk-tegra30.c171 30, 2, 0, 0, 8, 1, TEGRA_DIVIDER_INT | \
914 TEGRA_DIVIDER_INT, 16, 8, 1, NULL); in tegra30_super_clk_init()
923 TEGRA_DIVIDER_INT, 16, 8, 1, NULL); in tegra30_super_clk_init()
932 TEGRA_DIVIDER_INT, 16, 8, 1, NULL); in tegra30_super_clk_init()
949 TEGRA_DIVIDER_INT, 16, 8, 1, NULL); in tegra30_super_clk_init()
958 TEGRA_DIVIDER_INT, 16, 8, 1, NULL); in tegra30_super_clk_init()
967 TEGRA_DIVIDER_INT, 16, 8, 1, NULL); in tegra30_super_clk_init()
Dclk-tegra-periph.c168 30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_INT| \
175 30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_INT| \
182 29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_INT| \
210 29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_INT| \
862 PLL_OUT(2, PLLP_OUTA, 24, TEGRA_DIVIDER_INT, 16, pll_p_out2_int),
Dclk.h71 #define TEGRA_DIVIDER_INT BIT(2) macro
Dclk-tegra20.c821 TEGRA_DIVIDER_INT, 0, 8, 1, &emc_lock); in tegra20_emc_clk_init()