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Searched refs:TEGRA20_CLK_PLL_P (Results 1 – 4 of 4) sorted by relevance

/Linux-v5.4/drivers/clk/tegra/
Dclk-tegra20.c420 { .con_id = "pll_p", .dt_id = TEGRA20_CLK_PLL_P },
549 [tegra_clk_pll_p] = { .dt_id = TEGRA20_CLK_PLL_P, .present = true },
1042 { TEGRA20_CLK_PLL_P, TEGRA20_CLK_CLK_MAX, 216000000, 1 },
1054 { TEGRA20_CLK_UARTA, TEGRA20_CLK_PLL_P, 0, 0 },
1055 { TEGRA20_CLK_UARTB, TEGRA20_CLK_PLL_P, 0, 0 },
1056 { TEGRA20_CLK_UARTC, TEGRA20_CLK_PLL_P, 0, 0 },
1057 { TEGRA20_CLK_UARTD, TEGRA20_CLK_PLL_P, 0, 0 },
1058 { TEGRA20_CLK_UARTE, TEGRA20_CLK_PLL_P, 0, 0 },
1065 { TEGRA20_CLK_SDMMC1, TEGRA20_CLK_PLL_P, 48000000, 0 },
1066 { TEGRA20_CLK_SDMMC3, TEGRA20_CLK_PLL_P, 48000000, 0 },
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/Linux-v5.4/include/dt-bindings/clock/
Dtegra20-car.h144 #define TEGRA20_CLK_PLL_P 121 macro
/Linux-v5.4/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra20-host1x.txt361 <&tegra_car TEGRA20_CLK_PLL_P>;
376 <&tegra_car TEGRA20_CLK_PLL_P>;
/Linux-v5.4/arch/arm/boot/dts/
Dtegra20.dtsi104 <&tegra_car TEGRA20_CLK_PLL_P>;
121 <&tegra_car TEGRA20_CLK_PLL_P>;