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Searched refs:TEGRA20_CLK_PLL_A_OUT0 (Results 1 – 11 of 11) sorted by relevance

/Linux-v5.4/include/dt-bindings/clock/
Dtegra20-car.h136 #define TEGRA20_CLK_PLL_A_OUT0 113 macro
/Linux-v5.4/drivers/clk/tegra/
Dclk-tegra20.c432 { .con_id = "pll_a_out0", .dt_id = TEGRA20_CLK_PLL_A_OUT0 },
689 clks[TEGRA20_CLK_PLL_A_OUT0] = clk; in tegra20_pll_init()
1060 { TEGRA20_CLK_PLL_A_OUT0, TEGRA20_CLK_CLK_MAX, 11289600, 1 },
1063 { TEGRA20_CLK_I2S1, TEGRA20_CLK_PLL_A_OUT0, 11289600, 0 },
1064 { TEGRA20_CLK_I2S2, TEGRA20_CLK_PLL_A_OUT0, 11289600, 0 },
/Linux-v5.4/arch/arm/boot/dts/
Dtegra20-plutux.dts58 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
Dtegra20-tec.dts67 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
Dtegra20-medcom-wide.dts90 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
Dtegra20-trimslice.dts470 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
Dtegra20-paz00.dts602 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
Dtegra20-ventana.dts703 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
Dtegra20-harmony.dts778 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
Dtegra20-colibri.dtsi739 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
Dtegra20-seaboard.dts937 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,