Home
last modified time | relevance | path

Searched refs:TEGRA20_CLK_CDEV1 (Results 1 – 11 of 11) sorted by relevance

/Linux-v5.4/include/dt-bindings/clock/
Dtegra20-car.h116 #define TEGRA20_CLK_CDEV1 94 macro
/Linux-v5.4/arch/arm/boot/dts/
Dtegra20-plutux.dts59 <&tegra_car TEGRA20_CLK_CDEV1>;
Dtegra20-tec.dts68 <&tegra_car TEGRA20_CLK_CDEV1>;
Dtegra20-medcom-wide.dts91 <&tegra_car TEGRA20_CLK_CDEV1>;
Dtegra20-trimslice.dts471 <&tegra_car TEGRA20_CLK_CDEV1>;
Dtegra20-paz00.dts603 <&tegra_car TEGRA20_CLK_CDEV1>;
Dtegra20-ventana.dts704 <&tegra_car TEGRA20_CLK_CDEV1>;
Dtegra20-harmony.dts779 <&tegra_car TEGRA20_CLK_CDEV1>;
Dtegra20-colibri.dtsi740 <&tegra_car TEGRA20_CLK_CDEV1>;
Dtegra20-seaboard.dts938 <&tegra_car TEGRA20_CLK_CDEV1>;
/Linux-v5.4/drivers/clk/tegra/
Dclk-tegra20.c460 { .con_id = "cdev1", .dt_id = TEGRA20_CLK_CDEV1 },
866 clks[TEGRA20_CLK_CDEV1] = clk; in tegra20_periph_clk_init()
1061 { TEGRA20_CLK_CDEV1, TEGRA20_CLK_CLK_MAX, 0, 1 },
1125 if (clkspec->args[0] == TEGRA20_CLK_CDEV1 || in tegra20_clk_src_onecell_get()