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Searched refs:TCR_EL1 (Results 1 – 7 of 7) sorted by relevance

/Linux-v5.4/tools/testing/selftests/kvm/include/aarch64/
Dprocessor.h17 #define TCR_EL1 3, 0, 2, 0, 2 macro
/Linux-v5.4/arch/arm64/kvm/hyp/
Dsysreg-sr.c51 ctxt->sys_regs[TCR_EL1] = read_sysreg_el1(SYS_TCR); in __sysreg_save_el1_state()
125 write_sysreg_el1(ctxt->sys_regs[TCR_EL1], SYS_TCR); in __sysreg_restore_el1_state()
/Linux-v5.4/tools/testing/selftests/kvm/lib/aarch64/
Dprocessor.c261 get_reg(vm, vcpuid, ARM64_SYS_REG(TCR_EL1), &tcr_el1); in aarch64_vcpu_setup()
300 set_reg(vm, vcpuid, ARM64_SYS_REG(TCR_EL1), tcr_el1); in aarch64_vcpu_setup()
/Linux-v5.4/arch/arm64/include/asm/
Dkvm_host.h120 TCR_EL1, /* Translation Control Register */ enumerator
184 #define c2_TTBCR (TCR_EL1 * 2) /* Translation Table Base Control R. */
/Linux-v5.4/Documentation/arm64/
Dtagged-address-abi.rst16 On AArch64 the ``TCR_EL1.TBI0`` bit is set by default, allowing
/Linux-v5.4/arch/arm64/kvm/
Dsys_regs.c89 case TCR_EL1: return read_sysreg_s(SYS_TCR_EL12); in vcpu_read_sys_reg()
132 case TCR_EL1: write_sysreg_s(val, SYS_TCR_EL12); return; in vcpu_write_sys_reg()
1485 { SYS_DESC(SYS_TCR_EL1), access_vm_reg, reset_val, TCR_EL1, 0 },
/Linux-v5.4/arch/arm64/
DKconfig709 case-1 TTBR0_EL1 with TCR_EL1.NFD0 == 1.
711 case-3 TTBR1_EL1 with TCR_EL1.NFD1 == 1.
1294 table entries. When enabled in TCR_EL1 (HA and HD bits) on