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Searched refs:TB_CFG_PORT (Results 1 – 8 of 8) sorted by relevance

/Linux-v5.4/drivers/thunderbolt/
Dswitch.c471 res = tb_port_read(port, &phy, TB_CFG_PORT, port->cap_phy, 2); in tb_port_state()
566 TB_CFG_PORT, 4, 1); in tb_port_add_nfc_credits()
581 ret = tb_port_read(port, &data, TB_CFG_PORT, 5, 1); in tb_port_set_initial_credits()
588 return tb_port_write(port, &data, TB_CFG_PORT, 5, 1); in tb_port_set_initial_credits()
616 res = tb_port_read(port, &port->config, TB_CFG_PORT, 0, 8); in tb_init_port()
806 if (tb_port_read(port, &data, TB_CFG_PORT, port->cap_adap, 1)) in tb_pci_port_is_enabled()
822 return tb_port_write(port, &word, TB_CFG_PORT, port->cap_adap, 1); in tb_pci_port_enable()
836 ret = tb_port_read(port, &data, TB_CFG_PORT, port->cap_adap + 2, 1); in tb_dp_port_hpd_is_active()
854 ret = tb_port_read(port, &data, TB_CFG_PORT, port->cap_adap + 3, 1); in tb_dp_port_hpd_clear()
859 return tb_port_write(port, &data, TB_CFG_PORT, port->cap_adap + 3, 1); in tb_dp_port_hpd_clear()
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Dcap.c66 tb_port_read(port, &dummy, TB_CFG_PORT, 0, 1); in tb_port_dummy_read()
78 ret = tb_port_read(port, &header, TB_CFG_PORT, offset, 1); in __tb_port_find_cap()
Dtunnel.c243 ret = tb_port_read(in, &in_dp_cap, TB_CFG_PORT, in tb_dp_xchg_caps()
248 ret = tb_port_read(out, &out_dp_cap, TB_CFG_PORT, in tb_dp_xchg_caps()
254 ret = tb_port_write(out, &in_dp_cap, TB_CFG_PORT, in tb_dp_xchg_caps()
259 return tb_port_write(in, &out_dp_cap, TB_CFG_PORT, in tb_dp_xchg_caps()
Ddma_port.c96 .space = TB_CFG_PORT, in dma_port_read()
137 .space = TB_CFG_PORT, in dma_port_write()
Dicm.c1753 ret = pcie2cio_read(icm, TB_CFG_PORT, port0, PHY_PORT_CS1, &val0); in icm_reset_phy_port()
1756 ret = pcie2cio_read(icm, TB_CFG_PORT, port1, PHY_PORT_CS1, &val1); in icm_reset_phy_port()
1770 ret = pcie2cio_write(icm, TB_CFG_PORT, port0, PHY_PORT_CS1, val0); in icm_reset_phy_port()
1775 ret = pcie2cio_write(icm, TB_CFG_PORT, port1, PHY_PORT_CS1, val1); in icm_reset_phy_port()
1782 ret = pcie2cio_read(icm, TB_CFG_PORT, port0, PHY_PORT_CS1, &val0); in icm_reset_phy_port()
1785 ret = pcie2cio_read(icm, TB_CFG_PORT, port1, PHY_PORT_CS1, &val1); in icm_reset_phy_port()
1790 ret = pcie2cio_write(icm, TB_CFG_PORT, port0, PHY_PORT_CS1, val0); in icm_reset_phy_port()
1795 return pcie2cio_write(icm, TB_CFG_PORT, port1, PHY_PORT_CS1, val1); in icm_reset_phy_port()
Dtb_msgs.h17 TB_CFG_PORT = 1, enumerator
Deeprom.c352 res = tb_port_read(port, &type, TB_CFG_PORT, 2, 1); in tb_drom_parse_entry_port()
Dctl.c942 if (space == TB_CFG_PORT && in tb_cfg_get_error()