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/Linux-v5.4/arch/x86/crypto/
Daesni-intel_avx-x86_64.S606 .macro CALC_AAD_HASH GHASH_MUL AAD AADLEN T1 T2 T3 T4 T5 T6 T7 T8
622 \GHASH_MUL \T8, \T2, \T1, \T3, \T4, \T5, \T6
640 movq (%r10), \T1
643 vpslldq $8, \T1, \T1
645 vpxor \T1, \T7, \T7
651 movq %rax, \T1
654 vpslldq $12, \T1, \T1
656 vpxor \T1, \T7, \T7
663 vmovdqu aad_shift_arr(%r11), \T1
664 vpshufb \T1, \T7, \T7
[all …]
Dnh-sse2-x86_64.S21 #define T1 %xmm9 macro
36 movdqu \offset(MESSAGE), T1
42 movdqa T1, T2
43 movdqa T1, T3
44 paddd T1, \k0 // reuse k0 to avoid a move
45 paddd \k1, T1
52 pshufd $0x10, T1, T5
53 pshufd $0x32, T1, T1
59 pmuludq T5, T1
63 paddq T1, PASS1_SUMS
[all …]
Dsha256-avx2-asm.S110 T1 = %r12d define
167 rorx $13, a, T1 # T1 = a >> 13 # S0B
181 xor T1, y1 # y1 = (a>>22) ^ (a>>13) # S0
182 rorx $2, a, T1 # T1 = (a >> 2) # S0
186 xor T1, y1 # y1 = (a>>22) ^ (a>>13) ^ (a>>2) # S0
187 mov a, T1 # T1 = a # MAJB
188 and c, T1 # T1 = a&c # MAJB
192 or T1, y3 # y3 = MAJ = (a|c)&b)|(a&c) # MAJ
217 rorx $13, a, T1 # T1 = a >> 13 # S0B
230 xor T1, y1 # y1 = (a>>22) ^ (a>>13) # S0
[all …]
Dsha512-avx2-asm.S95 T1 = %r12 # clobbers CTX2 define
192 rorx $34, a, T1 # T1 = a >> 34 # S0B
204 xor T1, y1 # y1 = (a>>39) ^ (a>>34) # S0
205 rorx $28, a, T1 # T1 = (a >> 28) # S0
208 xor T1, y1 # y1 = (a>>39) ^ (a>>34) ^ (a>>28) # S0
209 mov a, T1 # T1 = a # MAJB
210 and c, T1 # T1 = a&c # MAJB
213 or T1, y3 # y3 = MAJ = (a|c)&b)|(a&c) # MAJ
256 rorx $34, a, T1 # T1 = a >> 34 # S0B
268 xor T1, y1 # y1 = (a>>39) ^ (a>>34) # S0
[all …]
Dnh-avx2-x86_64.S25 #define T1 %ymm9 macro
43 vpaddd \k1, T3, T1
50 vpshufd $0x10, T1, T5
51 vpshufd $0x32, T1, T1
57 vpmuludq T5, T1, T1
61 vpaddq T1, PASS1_SUMS, PASS1_SUMS
143 vpunpckhqdq PASS1_SUMS, PASS0_SUMS, T1 // T1 = (0B 1B 0D 1D)
148 vinserti128 $0x1, T3_XMM, T1, T5 // T5 = (0B 1B 2B 3B)
150 vperm2i128 $0x31, T3, T1, T1 // T1 = (0D 1D 2D 3D)
153 vpaddq T1, T0, T0
Dghash-clmulni-intel_asm.S27 #define T1 %xmm2 macro
48 movaps DATA, T1
55 PCLMULQDQ 0x11 SHASH T1 # T1 = a1 * b1
58 pxor T1, T2 # T2 = a0 * b1 + a1 * b0
64 pxor T2, T1 # <T1:DATA> is result of
78 pxor T3, T1
87 pxor T2, T1
88 pxor T1, DATA
Dsha512-ssse3-asm.S61 T1 = %rcx define
121 mov f_64, T1 # T1 = f
123 xor g_64, T1 # T1 = f ^ g
125 and e_64, T1 # T1 = (f ^ g) & e
127 xor g_64, T1 # T1 = ((f ^ g) & e) ^ g = CH(e,f,g)
129 add WK_2(idx), T1 # W[t] + K[t] from message scheduler
133 add h_64, T1 # T1 = CH(e,f,g) + W[t] + K[t] + h
135 add tmp0, T1 # T1 = CH(e,f,g) + W[t] + K[t] + S1(e)
144 add T1, d_64 # e(next_state) = d + T1
147 lea (T1, T2), h_64 # a(next_state) = T1 + Maj(a,b,c)
[all …]
Dsha512-avx-asm.S62 T1 = %rcx define
128 mov f_64, T1 # T1 = f
130 xor g_64, T1 # T1 = f ^ g
132 and e_64, T1 # T1 = (f ^ g) & e
134 xor g_64, T1 # T1 = ((f ^ g) & e) ^ g = CH(e,f,g)
136 add WK_2(idx), T1 # W[t] + K[t] from message scheduler
140 add h_64, T1 # T1 = CH(e,f,g) + W[t] + K[t] + h
142 add tmp0, T1 # T1 = CH(e,f,g) + W[t] + K[t] + S1(e)
151 add T1, d_64 # e(next_state) = d + T1
154 lea (T1, T2), h_64 # a(next_state) = T1 + Maj(a,b,c)
[all …]
Daegis128-aesni-asm.S20 #define T1 %xmm7 macro
193 movdqu (%rdx), T1
197 pxor KEY, T1
198 movdqa T1, STATE0
210 aegis128_update; pxor T1, STATE3
212 aegis128_update; pxor T1, STATE1
214 aegis128_update; pxor T1, STATE4
216 aegis128_update; pxor T1, STATE2
218 aegis128_update; pxor T1, STATE0
388 movdqa \s2, T1
[all …]
Dsha1_ssse3_asm.S196 .set T1, REG_T1 define
215 mov \c, T1
216 SWAP_REG_NAMES \c, T1
217 xor \d, T1
218 and \b, T1
219 xor \d, T1
223 mov \d, T1
224 SWAP_REG_NAMES \d, T1
225 xor \c, T1
226 xor \b, T1
[all …]
Dsha1_avx2_x86_64_asm.S117 .set T1, REG_T1 define
360 andn D, TB, T1
362 xor T1, TB
385 andn C, A, T1 /* ~b&d */
398 xor T1, A /* F1 = (b&c) ^ (~b&d) */
431 mov B, T1
432 or A, T1
440 and C, T1
442 or T1, A
/Linux-v5.4/arch/arm/crypto/
Dghash-ce-core.S12 T1 .req q1
160 vmull.p64 T1, XL_L, MASK
163 vext.8 T1, T1, T1, #8
165 veor T1, T1, XL
178 vshl.i64 T1, XL, #57
180 veor T1, T1, T2
182 veor T1, T1, T2
186 vshr.u64 T1, XL, #1
188 veor XL, XL, T1
189 vshr.u64 T1, T1, #6
[all …]
Dsha256-armv4.pl53 $T1="r3"; $t3="r3";
293 my ($T0,$T1,$T2,$T3,$T4,$T5)=("q8","q9","q10","q11","d24","d25");
317 &vext_8 ($T1,@X[2],@X[3],4); # X[9..12]
324 &vadd_i32 (@X[0],@X[0],$T1); # X[0..3] += X[9..12]
327 &vshr_u32 ($T1,$T0,$sigma0[2]);
336 &veor ($T1,$T1,$T2);
345 &veor ($T1,$T1,$T3); # sigma0(X[1..4])
354 &vadd_i32 (@X[0],@X[0],$T1); # X[0..3] += sigma0(X[1..4])
485 vld1.32 {$T1},[$Ktbl,:128]!
498 vadd.i32 $T1,$T1,@X[1]
[all …]
Dnh-neon-core.S39 T1 .req q9
59 vadd.u32 T1, T3, \k1
114 vst1.8 {T0-T1}, [HASH]
/Linux-v5.4/arch/arm64/crypto/
Dghash-ce-core.S13 T1 .req v2
151 trn2 T1.2d, SHASH.2d, HH.2d
152 eor SHASH2.16b, SHASH2.16b, T1.16b
155 trn2 T1.2d, HH3.2d, HH4.2d
156 eor HH34.16b, HH34.16b, T1.16b
174 movi T1.8b, #8
176 eor perm1.16b, perm1.16b, T1.16b
179 ushr T1.2d, perm1.2d, #24
182 sli T1.2d, perm1.2d, #40
188 tbl sh4.16b, {SHASH.16b}, T1.16b
[all …]
Dsha512-armv8.pl109 my ($T0,$T1,$T2)=(@X[($i-8)&15],@X[($i-9)&15],@X[($i-10)&15]);
164 ror $T1,@X[($j+1)&15],#$sigma0[0]
171 eor $T1,$T1,@X[($j+1)&15],ror#$sigma0[1]
179 eor $T1,$T1,@X[($j+1)&15],lsr#$sigma0[2] // sigma0(X[i+1])
188 add @X[$j],@X[$j],$T1
463 my ($T0,$T1,$T2,$T3,$T4,$T5,$T6,$T7) = map("q$_",(4..7,16..19));
495 &ushr_32 ($T1,$T0,$sigma0[2]);
505 &eor_8 ($T1,$T1,$T2);
514 &eor_8 ($T1,$T1,$T3); # sigma0(X[1..4])
526 &add_32 (@X[0],@X[0],$T1); # X[0..3] += sigma0(X[1..4])
[all …]
Dnh-neon-core.S26 T1 .req v9
44 add T1.4s, T3.4s, \k1\().4s
50 mov T5.d[0], T1.d[1]
54 umlal PASS1_SUMS.2d, T1.2s, T5.2s
100 addp T1.2d, PASS2_SUMS.2d, PASS3_SUMS.2d
101 st1 {T0.16b,T1.16b}, [HASH]
/Linux-v5.4/arch/sparc/crypto/
Daes_asm.S7 #define ENCRYPT_TWO_ROUNDS(KEY_BASE, I0, I1, T0, T1) \ argument
9 AES_EROUND23(KEY_BASE + 2, I0, I1, T1) \
10 AES_EROUND01(KEY_BASE + 4, T0, T1, I0) \
11 AES_EROUND23(KEY_BASE + 6, T0, T1, I1)
13 #define ENCRYPT_TWO_ROUNDS_2(KEY_BASE, I0, I1, I2, I3, T0, T1, T2, T3) \ argument
15 AES_EROUND23(KEY_BASE + 2, I0, I1, T1) \
18 AES_EROUND01(KEY_BASE + 4, T0, T1, I0) \
19 AES_EROUND23(KEY_BASE + 6, T0, T1, I1) \
23 #define ENCRYPT_TWO_ROUNDS_LAST(KEY_BASE, I0, I1, T0, T1) \ argument
25 AES_EROUND23(KEY_BASE + 2, I0, I1, T1) \
[all …]
/Linux-v5.4/drivers/block/drbd/
Ddrbd_state.h40 #define NS2(T1, S1, T2, S2) \ argument
41 ({ union drbd_state mask; mask.i = 0; mask.T1 = T1##_MASK; \
43 ({ union drbd_state val; val.i = 0; val.T1 = (S1); \
45 #define NS3(T1, S1, T2, S2, T3, S3) \ argument
46 ({ union drbd_state mask; mask.i = 0; mask.T1 = T1##_MASK; \
48 ({ union drbd_state val; val.i = 0; val.T1 = (S1); \
53 #define _NS2(D, T1, S1, T2, S2) \ argument
54 D, ({ union drbd_state __ns; __ns = drbd_read_state(D); __ns.T1 = (S1); \
56 #define _NS3(D, T1, S1, T2, S2, T3, S3) \ argument
57 D, ({ union drbd_state __ns; __ns = drbd_read_state(D); __ns.T1 = (S1); \
/Linux-v5.4/crypto/
Danubis.c119 static const u32 T1[256] = { variable
539 inter[i] ^= T1[(kappa[j--] >> 16) & 0xff]; in anubis_setkey()
565 T1[T4[(v >> 16) & 0xff] & 0xff] ^ in anubis_setkey()
597 T1[(state[1] >> 24) ] ^ in anubis_crypt()
603 T1[(state[1] >> 16) & 0xff] ^ in anubis_crypt()
609 T1[(state[1] >> 8) & 0xff] ^ in anubis_crypt()
615 T1[(state[1] ) & 0xff] ^ in anubis_crypt()
631 (T1[(state[1] >> 24) ] & 0x00ff0000U) ^ in anubis_crypt()
637 (T1[(state[1] >> 16) & 0xff] & 0x00ff0000U) ^ in anubis_crypt()
643 (T1[(state[1] >> 8) & 0xff] & 0x00ff0000U) ^ in anubis_crypt()
[all …]
Dkhazad.c127 static const u64 T1[256] = { variable
772 T1[(int)(K1 >> 48) & 0xff] ^ in khazad_setkey()
788 T1[(int)S[(int)(K1 >> 48) & 0xff] & 0xff] ^ in khazad_setkey()
814 T1[(int)(state >> 48) & 0xff] ^ in khazad_crypt()
825 (T1[(int)(state >> 48) & 0xff] & 0x00ff000000000000ULL) ^ in khazad_crypt()
/Linux-v5.4/drivers/staging/isdn/avm/
DKconfig32 tristate "AVM T1/T1-B ISA support"
35 Enable support for the AVM T1 T1B card.
52 tristate "AVM T1/T1-B PCI support"
55 Enable support for the AVM T1 T1B card.
/Linux-v5.4/arch/mips/mm/
Dpage.c46 #define T1 9 macro
477 build_copy_load(&buf, T1, off + copy_word_size); in build_copy_page()
485 build_copy_store(&buf, T1, off + copy_word_size); in build_copy_page()
499 build_copy_load(&buf, T1, off + copy_word_size); in build_copy_page()
507 build_copy_store(&buf, T1, off + copy_word_size); in build_copy_page()
524 build_copy_load(&buf, T1, off + copy_word_size); in build_copy_page()
530 build_copy_store(&buf, T1, off + copy_word_size); in build_copy_page()
542 build_copy_load(&buf, T1, off + copy_word_size); in build_copy_page()
548 build_copy_store(&buf, T1, off + copy_word_size); in build_copy_page()
566 build_copy_load(&buf, T1, off + copy_word_size); in build_copy_page()
[all …]
/Linux-v5.4/arch/mips/kvm/
Dentry.c32 #define T1 9 macro
39 #define T1 13 macro
347 uasm_i_ext(&p, T1, T0, MIPS_GCTL1_ID_SHIFT, in kvm_mips_build_enter_guest()
349 uasm_i_ins(&p, T0, T1, MIPS_GCTL1_RID_SHIFT, in kvm_mips_build_enter_guest()
365 UASM_i_ADDIU(&p, T1, S0, in kvm_mips_build_enter_guest()
375 UASM_i_ADDIU(&p, T1, K1, offsetof(struct kvm_vcpu_arch, in kvm_mips_build_enter_guest()
378 UASM_i_ADDIU(&p, T1, K1, offsetof(struct kvm_vcpu_arch, in kvm_mips_build_enter_guest()
388 UASM_i_ADDU(&p, T3, T1, T2); in kvm_mips_build_enter_guest()
414 (int)offsetof(struct mm_struct, context.asid), T1); in kvm_mips_build_enter_guest()
/Linux-v5.4/scripts/coccinelle/free/
Dput_device.cocci16 type T,T1,T2,T3;
29 when != e1 = (T1)platform_get_drvdata(id)

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