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Searched refs:SW (Results 1 – 25 of 65) sorted by relevance

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/Linux-v5.4/arch/ia64/kernel/
Dentry.h25 #define SW(f) (IA64_SWITCH_STACK_##f##_OFFSET) macro
43 .savesp ar.unat,SW(CALLER_UNAT)+16+(off); \
44 .savesp ar.fpsr,SW(AR_FPSR)+16+(off); \
45 .spillsp f2,SW(F2)+16+(off); .spillsp f3,SW(F3)+16+(off); \
46 .spillsp f4,SW(F4)+16+(off); .spillsp f5,SW(F5)+16+(off); \
47 .spillsp f16,SW(F16)+16+(off); .spillsp f17,SW(F17)+16+(off); \
48 .spillsp f18,SW(F18)+16+(off); .spillsp f19,SW(F19)+16+(off); \
49 .spillsp f20,SW(F20)+16+(off); .spillsp f21,SW(F21)+16+(off); \
50 .spillsp f22,SW(F22)+16+(off); .spillsp f23,SW(F23)+16+(off); \
51 .spillsp f24,SW(F24)+16+(off); .spillsp f25,SW(F25)+16+(off); \
[all …]
Dentry.S252 adds r14=SW(R4)+16,sp
262 adds r15=SW(R5)+16,sp
266 add r14=SW(R4)+16,sp
268 st8.spill [r14]=r4,SW(R6)-SW(R4) // spill r4 and prefetch offset 0x1c0
276 adds r15=SW(R5)+16,sp
279 st8.spill [r15]=r5,SW(R7)-SW(R5) // spill r5
281 add r2=SW(F2)+16,sp // r2 = &sw->f2
283 st8.spill [r14]=r6,SW(B0)-SW(R6) // spill r6
285 add r3=SW(F3)+16,sp // r3 = &sw->f3
292 st8.spill [r15]=r7,SW(B2)-SW(R7) // spill r7
[all …]
Dmca_asm.S567 add temp1=SW(F2), regs
568 add temp2=SW(F3), regs
603 stf.spill [temp1]=f30,SW(B2)-SW(F30)
604 stf.spill [temp2]=f31,SW(B3)-SW(F31)
613 st8 [temp1]=temp3,SW(AR_LC)-SW(B4) // save b4
726 add temp1=SW(F2), regs
727 add temp2=SW(F3), regs
762 ldf.fill f30=[temp1],SW(B2)-SW(F30)
763 ldf.fill f31=[temp2],SW(B3)-SW(F31)
770 ld8 temp3=[temp1],SW(AR_LC)-SW(B4) // restore b4
Dunwind.c2253 unw.sw_off[unw.preg_index[UNW_REG_PRI_UNAT_GR]] = SW(CALLER_UNAT); in unw_init()
2254 unw.sw_off[unw.preg_index[UNW_REG_BSPSTORE]] = SW(AR_BSPSTORE); in unw_init()
2255 unw.sw_off[unw.preg_index[UNW_REG_PFS]] = SW(AR_PFS); in unw_init()
2256 unw.sw_off[unw.preg_index[UNW_REG_RP]] = SW(B0); in unw_init()
2257 unw.sw_off[unw.preg_index[UNW_REG_UNAT]] = SW(CALLER_UNAT); in unw_init()
2258 unw.sw_off[unw.preg_index[UNW_REG_PR]] = SW(PR); in unw_init()
2259 unw.sw_off[unw.preg_index[UNW_REG_LC]] = SW(AR_LC); in unw_init()
2260 unw.sw_off[unw.preg_index[UNW_REG_FPSR]] = SW(AR_FPSR); in unw_init()
2261 for (i = UNW_REG_R4, off = SW(R4); i <= UNW_REG_R7; ++i, off += 8) in unw_init()
2263 for (i = UNW_REG_B1, off = SW(B1); i <= UNW_REG_B5; ++i, off += 8) in unw_init()
[all …]
/Linux-v5.4/arch/parisc/include/asm/
Dfloppy.h28 #define SW fd_routine[use_virtual_dma&1] macro
40 #define fd_get_dma_residue() SW._get_dma_residue(FLOPPY_DMA)
41 #define fd_dma_mem_alloc(size) SW._dma_mem_alloc(size)
42 #define fd_dma_setup(addr, size, mode, io) SW._dma_setup(addr, size, mode, io)
/Linux-v5.4/Documentation/misc-devices/
Deeprom.rst38 Atmel 34C02B 2K 0x50 - 0x57, SW write protect at 0x30-37
39 Catalyst 34FC02 2K 0x50 - 0x57, SW write protect at 0x30-37
40 Catalyst 34RC02 2K 0x50 - 0x57, SW write protect at 0x30-37
41 Fairchild 34W02 2K 0x50 - 0x57, SW write protect at 0x30-37
42 Microchip 24AA52 2K 0x50 - 0x57, SW write protect at 0x30-37
43 ST M34C02 2K 0x50 - 0x57, SW write protect at 0x30-37
/Linux-v5.4/arch/x86/include/asm/
Dfloppy.h30 #define SW fd_routine[use_virtual_dma & 1] macro
42 #define fd_get_dma_residue() SW._get_dma_residue(FLOPPY_DMA)
43 #define fd_dma_mem_alloc(size) SW._dma_mem_alloc(size)
44 #define fd_dma_setup(addr, size, mode, io) SW._dma_setup(addr, size, mode, io)
/Linux-v5.4/drivers/clk/bcm/
Dclk-kona.h57 #define gate_is_sw_controllable(gate) FLAG_TEST(gate, GATE, SW)
165 .flags = FLAG(GATE, HW)|FLAG(GATE, SW)| \
177 .flags = FLAG(GATE, HW)|FLAG(GATE, SW)| \
188 .flags = FLAG(GATE, HW)|FLAG(GATE, SW)| \
198 .flags = FLAG(GATE, SW)|FLAG(GATE, SW_MANAGED)| \
/Linux-v5.4/Documentation/devicetree/bindings/misc/
Daspeed,cvic.txt12 The AST2500 supports a SW generated interrupt
25 SW interrupts from the ARM to the coprocessor.
/Linux-v5.4/arch/arm/boot/dts/
Dexynos5250-arndale.dts33 label = "SW-TACT2";
40 label = "SW-TACT3";
47 label = "SW-TACT4";
54 label = "SW-TACT5";
61 label = "SW-TACT6";
68 label = "SW-TACT7";
/Linux-v5.4/Documentation/devicetree/bindings/power/reset/
Dst-reset.txt1 *Device-Tree bindings for ST SW reset functionality
/Linux-v5.4/Documentation/ABI/testing/
Dsysfs-driver-hid-corsair5 Description: Get/set the current playback mode. "SW" for software mode
/Linux-v5.4/Documentation/devicetree/bindings/arm/freescale/
Dfsl,imx7ulp-sim.txt5 and a set of registers have been made available in DGO domain for SW use, with the
/Linux-v5.4/Documentation/devicetree/bindings/reset/
Dsnps,hsdk-reset.txt10 configuration register and second for corresponding SW reset and status bits
/Linux-v5.4/arch/powerpc/kernel/
Dalign.c40 #define SW 0x20 /* byte swap */ macro
230 if (flags & SW) { in emulate_spe()
/Linux-v5.4/Documentation/networking/device_drivers/intel/
Dipw2100.txt164 1 = SW based RF kill active (radio off)
166 3 = Both HW and SW RF kill active (radio off)
168 0 = If SW based RF kill active, turn the radio back on
169 1 = If radio is on, activate SW based RF kill
171 NOTE: If you enable the SW based RF kill and then toggle the HW
Dipw2200.txt294 1 = SW based RF kill active (radio off)
296 3 = Both HW and SW RF kill active (radio off)
298 0 = If SW based RF kill active, turn the radio back on
299 1 = If radio is on, activate SW based RF kill
301 NOTE: If you enable the SW based RF kill and then toggle the HW
/Linux-v5.4/Documentation/hwmon/
Dfam15h_power.rst102 iii. At time x, SW reads CpuSwPwrAcc MSR and samples the PTSC.
106 iv. At time y, SW reads CpuSwPwrAcc MSR and samples the PTSC.
/Linux-v5.4/Documentation/hid/
Dhid-alps.rst149 SW ON/OFF status
174 SW ON/OFF status
/Linux-v5.4/Documentation/devicetree/bindings/pci/
Dbrcm,iproc-pcie.txt31 by the ASIC after power on reset. In this case, SW is required to configure
35 by the ASIC after power on reset. In this case, SW needs to configure it
/Linux-v5.4/drivers/regulator/
Dmc13xxx.h104 MC13xxx_DEFINE(SW, _name, _node, _reg, _vsel_reg, _voltages, ops)
/Linux-v5.4/Documentation/devicetree/bindings/mfd/
Dmax77620.txt43 source (SW). When enabled/disabled, the master sequencing timer generates
80 software (SW).
Daxp20x.txt168 SW : On/Off Switch : swin-supply
195 SW : On/Off Switch : swin-supply
224 SW : On/Off Switch : swin-supply
/Linux-v5.4/arch/arm64/boot/dts/renesas/
Dr8a77995-draak.dts259 * CVBS and HDMI inputs through SW[49-53]
332 * CVBS and HDMI inputs through SW[49-53]
/Linux-v5.4/Documentation/devicetree/bindings/usb/
Ddwc3.txt43 failure SW work-around for DWC_usb31 version 1.70a-ea06
45 - snps,disable_scramble_quirk: true when SW should disable data scrambling.

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