Searched refs:SSCR1_SPO (Results 1 – 3 of 3) sorted by relevance
71 #define SSCR1_SPO (1 << 3) /* Motorola SPI SSPSCLK polarity setting */ macro
50 | SSCR1_SPH | SSCR1_SPO | SSCR1_LBM)56 | SSCR1_SPH | SSCR1_SPO | SSCR1_LBM)63 | SSCR1_SPH | SSCR1_SPO | SSCR1_LBM)1353 chip->cr1 &= ~(SSCR1_SPO | SSCR1_SPH); in setup()1355 | (((spi->mode & SPI_CPOL) != 0) ? SSCR1_SPO : 0); in setup()
788 #define SSCR1_SPO 0x00000008 /* Sample clock (SCLK) POlarity */ macro789 #define SSCR1_SClkIactL (SSCR1_SPO*0) /* Sample Clock Inactive Low */790 #define SSCR1_SClkIactH (SSCR1_SPO*1) /* Sample Clock Inactive High */
