Searched refs:SSCR1_SCLKDIR (Results 1 – 4 of 4) sorted by relevance
133 #define SSCR1_SCLKDIR (1 << 25) /* Serial Bit Rate Clock Direction */ macro
446 ~(SSCR1_SCLKDIR | SSCR1_SFRMDIR | SSCR1_SCFR | in pxa_ssp_configure_dai_fmt()455 sscr1 |= SSCR1_SCLKDIR | SSCR1_SFRMDIR | SSCR1_SCFR; in pxa_ssp_configure_dai_fmt()458 sscr1 |= SSCR1_SCLKDIR | SSCR1_SCFR; in pxa_ssp_configure_dai_fmt()
52 | SSCR1_SCLKDIR /* SCLKDIR = 1; Slave mode */
46 | SSCR1_ECRA | SSCR1_ECRB | SSCR1_SCLKDIR \59 | SSCR1_ECRA | SSCR1_ECRB | SSCR1_SCLKDIR \1310 chip->cr1 |= SSCR1_SCLKDIR; in setup()1753 SSCR1_SCLKDIR | in pxa2xx_spi_probe()
