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Searched refs:SS (Results 1 – 25 of 46) sorted by relevance

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/Linux-v5.4/arch/x86/include/uapi/asm/
Dptrace-abi.h23 #define SS 16 macro
59 #define SS 160 macro
/Linux-v5.4/tools/perf/arch/x86/tests/
Dregs_load.S15 #define SS 11 * 8 macro
48 movq $0, SS(%rdi)
85 movl $0, SS(%edi)
/Linux-v5.4/drivers/net/wireless/mediatek/mt76/mt76x2/
DKconfig14 2SS to 866Mbit/s PHY rate.
26 which comply with IEEE 802.11ac standards and support 2SS to
/Linux-v5.4/Documentation/devicetree/bindings/phy/
Dbrcm,stingray-usb-phy.txt5 - "brcm,sr-usb-combo-phy" is combo PHY has two PHYs, one SS and one HS.
10 the PHY number of two PHYs. 0 for HS PHY and 1 for SS PHY.
Dbrcm,sr-pcie-phy.txt5 - reg: base address and length of the PCIe SS register space
Dqcom-dwc3-usb-phy.txt1 Qualcomm DWC3 HS AND SS PHY CONTROLLER
Duniphier-usb3-ssphy.txt1 Socionext UniPhier USB3 Super-Speed (SS) PHY
/Linux-v5.4/arch/x86/um/
Dptrace_64.c42 [SS >> 3] = HOST_SS,
92 case SS: in putreg()
171 case SS: in getreg()
Dptrace_32.c71 [SS] = HOST_SS,
107 case SS: in putreg()
153 case SS: in getreg()
Duser-offsets.c47 DEFINE(HOST_SS, SS); in foo()
76 DEFINE_LONGS(HOST_SS, SS); in foo()
Dsignal.c198 GETREG(SS, ss); in copy_sc_from_user()
280 PUTREG(SS, ss); in copy_sc_to_user()
/Linux-v5.4/Documentation/devicetree/bindings/connector/
Dusb-connector.txt67 1: Super Speed (SS), present in SS capable connectors,
85 to companion PMIC (max77865), SS lines to USB3 PHY and SBU to DisplayPort.
86 DisplayPort video lines are routed to the connector via SS mux in USB3 PHY.
/Linux-v5.4/arch/x86/kernel/
Dftrace_64.S29 #define MCOUNT_REG_SIZE (SS+8 + MCOUNT_FRAME_SIZE)
200 movq %rcx, SS(%rsp)
/Linux-v5.4/drivers/net/wireless/mediatek/mt76/mt7615/
DKconfig10 and 2.4GHz, IEEE 802.11ac 4x4:4SS 1733Mbps PHY rate, wave2
/Linux-v5.4/Documentation/devicetree/bindings/media/
Drenesas,drif.txt9 | Master |-----SS-------->|SYNC DRIFn (slave) |
92 | Master |-----SS-------->|SYNC DRIFn (slave) |
140 | Master |-----SS-------->|SYNC DRIFn (slave) |
/Linux-v5.4/drivers/memory/
Dti-aemif.c40 #define SS(x) ((x) << SS_SHIFT) macro
62 #define SS_VAL(x) (((x) & SS(SS_MAX)) >> SS_SHIFT)
80 EW(EW_MAX) | SS(SS_MAX) | \
/Linux-v5.4/Documentation/devicetree/bindings/usb/
Dqcom,dwc3.txt14 "core" Master/Core clock, have to be >= 125 MHz for SS
31 >=125Mhz (125000000) for MASTER_CLK in SS mode
Ddwc3-xilinx.txt7 "bus_clk" Master/Core clock, have to be >= 125 MHz for SS
Drockchip,dwc3.txt10 "bus_clk" Master/Core clock, have to be >= 62.5 MHz for SS
Ddwc3.txt35 the second element is expected to be a handle to the USB3/SS PHY
50 - snps,u2ss_inp3_quirk: set if we enable P3 OK for U2/SS Inactive quirk
/Linux-v5.4/arch/x86/um/os-Linux/
Dmcontext.c18 COPY(EIP); COPY_SEG_CPL3(CS); COPY(EFL); COPY_SEG_CPL3(SS); in get_regs_from_mc()
/Linux-v5.4/drivers/power/supply/
Dbq24190_charger.c359 #undef SS
390 BQ24190_SYSFS_FIELD_RO(vbus_stat, SS, VBUS_STAT),
391 BQ24190_SYSFS_FIELD_RO(chrg_stat, SS, CHRG_STAT),
392 BQ24190_SYSFS_FIELD_RO(dpm_stat, SS, DPM_STAT),
393 BQ24190_SYSFS_FIELD_RO(pg_stat, SS, PG_STAT),
394 BQ24190_SYSFS_FIELD_RO(therm_stat, SS, THERM_STAT),
395 BQ24190_SYSFS_FIELD_RO(vsys_stat, SS, VSYS_STAT),
/Linux-v5.4/drivers/usb/cdns3/
DKconfig22 This controller supports FF, HS and SS mode. It doesn't support
/Linux-v5.4/arch/x86/entry/
Dcalling.h96 #define SS 20*8 macro
/Linux-v5.4/Documentation/networking/caif/
Dspi_porting.txt52 signal a change of state of the input GPIO (SS) to the interface.
120 * SS signal. Once a edge is detected, the ss_cb() function should be

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