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Searched refs:SRII (Results 1 – 15 of 15) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dce/
Ddce_clock_source.h61 SRII(PHASE, DP_DTO, 0),\
62 SRII(PHASE, DP_DTO, 1),\
63 SRII(PHASE, DP_DTO, 2),\
64 SRII(PHASE, DP_DTO, 3),\
65 SRII(PHASE, DP_DTO, 4),\
66 SRII(PHASE, DP_DTO, 5),\
67 SRII(MODULO, DP_DTO, 0),\
68 SRII(MODULO, DP_DTO, 1),\
69 SRII(MODULO, DP_DTO, 2),\
70 SRII(MODULO, DP_DTO, 3),\
[all …]
Ddce_hwseq.h43 SRII(DCFE_CLOCK_CONTROL, DCFE, 0), \
44 SRII(DCFE_CLOCK_CONTROL, DCFE, 1), \
45 SRII(DCFE_CLOCK_CONTROL, DCFE, 2), \
46 SRII(DCFE_CLOCK_CONTROL, DCFE, 3), \
47 SRII(DCFE_CLOCK_CONTROL, DCFE, 4), \
48 SRII(DCFE_CLOCK_CONTROL, DCFE, 5), \
52 SRII(BLND_V_UPDATE_LOCK, BLND, 0), \
53 SRII(BLND_V_UPDATE_LOCK, BLND, 1), \
54 SRII(BLND_V_UPDATE_LOCK, BLND, 2), \
55 SRII(BLND_V_UPDATE_LOCK, BLND, 3), \
[all …]
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_mpc.h35 SRII(MPCC_TOP_GAIN, MPCC, inst),\
36 SRII(MPCC_BOT_GAIN_INSIDE, MPCC, inst),\
37 SRII(MPCC_BOT_GAIN_OUTSIDE, MPCC, inst),\
38 SRII(MPCC_OGAM_RAMA_START_CNTL_B, MPCC_OGAM, inst),\
39 SRII(MPCC_OGAM_RAMA_START_CNTL_G, MPCC_OGAM, inst),\
40 SRII(MPCC_OGAM_RAMA_START_CNTL_R, MPCC_OGAM, inst),\
41 SRII(MPCC_OGAM_RAMA_SLOPE_CNTL_B, MPCC_OGAM, inst),\
42 SRII(MPCC_OGAM_RAMA_SLOPE_CNTL_G, MPCC_OGAM, inst),\
43 SRII(MPCC_OGAM_RAMA_SLOPE_CNTL_R, MPCC_OGAM, inst),\
44 SRII(MPCC_OGAM_RAMA_END_CNTL1_B, MPCC_OGAM, inst),\
[all …]
Ddcn20_dwb.h49 #define SRII(reg_name, block, id)\ macro
Ddcn20_mmhubbub.h51 #define SRII(reg_name, block, id)\ macro
Ddcn20_resource.c324 #define SRII(reg_name, block, id)\ macro
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_mpc.h34 SRII(MPCC_TOP_SEL, MPCC, inst),\
35 SRII(MPCC_BOT_SEL, MPCC, inst),\
36 SRII(MPCC_CONTROL, MPCC, inst),\
37 SRII(MPCC_STATUS, MPCC, inst),\
38 SRII(MPCC_OPP_ID, MPCC, inst),\
39 SRII(MPCC_BG_G_Y, MPCC, inst),\
40 SRII(MPCC_BG_R_CR, MPCC, inst),\
41 SRII(MPCC_BG_B_CB, MPCC, inst),\
42 SRII(MPCC_BG_B_CB, MPCC, inst),\
43 SRII(MPCC_SM_CONTROL, MPCC, inst)
[all …]
Ddcn10_dwb.h45 #define SRII(reg_name, block, id)\ macro
Ddcn10_resource.c178 #define SRII(reg_name, block, id)\ macro
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dce100/
Ddce100_resource.c450 #define SRII(reg_name, block, id)\ macro
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dce120/
Ddce120_resource.c703 #define SRII(reg_name, block, id)\ macro
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dce110/
Ddce110_resource.c492 #define SRII(reg_name, block, id)\ macro
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dce112/
Ddce112_resource.c470 #define SRII(reg_name, block, id)\ macro
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dce80/
Ddce80_resource.c562 #define SRII(reg_name, block, id)\ macro
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_resource.c297 #define SRII(reg_name, block, id)\ macro