Searched refs:SPLL_CTL (Results 1 – 6 of 6) sorted by relevance
514 I915_WRITE(SPLL_CTL, pll->state.hw_state.spll); in hsw_ddi_spll_enable()515 POSTING_READ(SPLL_CTL); in hsw_ddi_spll_enable()543 val = I915_READ(SPLL_CTL); in hsw_ddi_spll_disable()544 I915_WRITE(SPLL_CTL, val & ~SPLL_PLL_ENABLE); in hsw_ddi_spll_disable()545 POSTING_READ(SPLL_CTL); in hsw_ddi_spll_disable()588 val = I915_READ(SPLL_CTL); in hsw_ddi_spll_get_hw_state()
1632 pll = I915_READ(SPLL_CTL) & SPLL_FREQ_MASK; in hsw_ddi_clock_get()
4249 I915_STATE_WARN(I915_READ(SPLL_CTL) & SPLL_PLL_ENABLE, in assert_can_disable_lcpll()
9282 u32 ctl = I915_READ(SPLL_CTL); in spll_uses_pch_ssc()
2403 MMIO_D(SPLL_CTL, D_ALL); in init_generic_mmio_info()
9531 #define SPLL_CTL _MMIO(0x46020) macro
