Searched refs:SOR_LANE_SEQ_CTL (Results 1 – 2 of 2) sorted by relevance
/Linux-v5.4/drivers/gpu/drm/tegra/ |
D | sor.h | 155 #define SOR_LANE_SEQ_CTL 0x21 macro
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D | sor.c | 1211 tegra_sor_writel(sor, value, SOR_LANE_SEQ_CTL); in tegra_sor_power_down() 1216 value = tegra_sor_readl(sor, SOR_LANE_SEQ_CTL); in tegra_sor_power_down() 1341 DEBUGFS_REG32(SOR_LANE_SEQ_CTL), 1858 tegra_sor_writel(sor, value, SOR_LANE_SEQ_CTL); in tegra_sor_edp_enable() 1861 value = tegra_sor_readl(sor, SOR_LANE_SEQ_CTL); in tegra_sor_edp_enable() 2490 value = tegra_sor_readl(sor, SOR_LANE_SEQ_CTL); in tegra_sor_hdmi_enable() 2499 tegra_sor_writel(sor, value, SOR_LANE_SEQ_CTL); in tegra_sor_hdmi_enable() 2502 value = tegra_sor_readl(sor, SOR_LANE_SEQ_CTL); in tegra_sor_hdmi_enable()
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