Searched refs:SOR_DP_SPARE_SEQ_ENABLE (Results 1 – 2 of 2) sorted by relevance
300 #define SOR_DP_SPARE_SEQ_ENABLE (1 << 0) macro
668 value |= SOR_DP_SPARE_SEQ_ENABLE; in tegra_sor_dp_train_fast()2535 value &= ~SOR_DP_SPARE_SEQ_ENABLE; in tegra_sor_hdmi_enable()
