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Searched refs:SOC15_REG_ENTRY (Results 1 – 6 of 6) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/powerplay/hwmgr/
Dvega10_baco.c36 …{CMD_READMODIFYWRITE, SOC15_REG_ENTRY(NBIF, 0, mmBIF_DOORBELL_CNTL), BIF_DOORBELL_CNTL__DOORBELL_M…
37 {CMD_WRITE, SOC15_REG_ENTRY(NBIF, 0, mmBIF_FB_EN), 0, 0, 0, 0},
38 …{CMD_READMODIFYWRITE, SOC15_REG_ENTRY(NBIF, 0, mmBACO_CNTL), BACO_CNTL__BACO_DSTATE_BYPASS_MASK, B…
39 …{CMD_READMODIFYWRITE, SOC15_REG_ENTRY(NBIF, 0, mmBACO_CNTL), BACO_CNTL__BACO_RST_INTR_MASK_MASK, B…
44 …{CMD_WAITFOR, SOC15_REG_ENTRY(THM, 0, mmTHM_BACO_CNTL), THM_BACO_CNTL__SOC_DOMAIN_IDLE_MASK, THM_B…
45 …{CMD_READMODIFYWRITE, SOC15_REG_ENTRY(NBIF, 0, mmBACO_CNTL), BACO_CNTL__BACO_EN_MASK, BACO_CNTL__B…
46 …{CMD_READMODIFYWRITE, SOC15_REG_ENTRY(NBIF, 0, mmBACO_CNTL), BACO_CNTL__BACO_BIF_LCLK_SWITCH_MASK,…
47 …{CMD_READMODIFYWRITE, SOC15_REG_ENTRY(NBIF, 0, mmBACO_CNTL), BACO_CNTL__BACO_DUMMY_EN_MASK, BACO_C…
48 …{CMD_READMODIFYWRITE, SOC15_REG_ENTRY(THM, 0, mmTHM_BACO_CNTL), THM_BACO_CNTL__BACO_SOC_VDCI_RESET…
49 …{CMD_READMODIFYWRITE, SOC15_REG_ENTRY(THM, 0, mmTHM_BACO_CNTL), THM_BACO_CNTL__BACO_SMNCLK_MUX_MAS…
[all …]
Dvega20_baco.c36 {CMD_WRITE, SOC15_REG_ENTRY(NBIF, 0, mmBIOS_SCRATCH_6), 0, 0, 0, 0},
37 {CMD_WRITE, SOC15_REG_ENTRY(NBIF, 0, mmBIOS_SCRATCH_7), 0, 0, 0, 0},
/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dgfx_v9_0.c4159 { SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE0), 0xffffffff },
4160 { SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE1), 0xffffffff },
4161 { SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE2), 0xffffffff },
4162 { SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE3), 0xffffffff },
4163 { SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_RESOURCE_LIMITS), 0x1000000 }, /* CU_GROUP_COUNT=1 */
4164 { SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_NUM_THREAD_X), 256*2 },
4165 { SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_NUM_THREAD_Y), 1 },
4166 { SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_NUM_THREAD_Z), 1 },
4167 …{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_PGM_RSRC1), 0x100007f }, /* VGPRS=15 (256 logical VGPRs, SGPRS=…
4168 { SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_PGM_RSRC2), 0x400000 }, /* 64KB LDS */
[all …]
Dnv.c162 { SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS)},
163 { SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS2)},
164 { SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS_SE0)},
165 { SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS_SE1)},
166 { SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS_SE2)},
167 { SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS_SE3)},
169 { SOC15_REG_ENTRY(SDMA0, 0, mmSDMA0_STATUS_REG)},
170 { SOC15_REG_ENTRY(SDMA1, 0, mmSDMA1_STATUS_REG)},
172 { SOC15_REG_ENTRY(GC, 0, mmCP_STAT)},
173 { SOC15_REG_ENTRY(GC, 0, mmCP_STALLED_STAT1)},
[all …]
Dsoc15.c324 { SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS)},
325 { SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS2)},
326 { SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS_SE0)},
327 { SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS_SE1)},
328 { SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS_SE2)},
329 { SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS_SE3)},
330 { SOC15_REG_ENTRY(SDMA0, 0, mmSDMA0_STATUS_REG)},
331 { SOC15_REG_ENTRY(SDMA1, 0, mmSDMA1_STATUS_REG)},
332 { SOC15_REG_ENTRY(GC, 0, mmCP_STAT)},
333 { SOC15_REG_ENTRY(GC, 0, mmCP_STALLED_STAT1)},
[all …]
Dsoc15.h63 #define SOC15_REG_ENTRY(ip, inst, reg) ip##_HWIP, inst, reg##_BASE_IDX, reg macro