Searched refs:SMC_SYSCON_RESET_CNTL (Results 1 – 12 of 12) sorted by relevance
| /Linux-v5.4/drivers/gpu/drm/amd/amdgpu/ |
| D | si_smc.c | 113 u32 tmp = RREG32_SMC(SMC_SYSCON_RESET_CNTL); in amdgpu_si_start_smc() 117 WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp); in amdgpu_si_start_smc() 129 tmp = RREG32_SMC(SMC_SYSCON_RESET_CNTL) | in amdgpu_si_reset_smc() 131 WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp); in amdgpu_si_reset_smc() 155 u32 rst = RREG32_SMC(SMC_SYSCON_RESET_CNTL); in amdgpu_si_is_smc_running()
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| D | sid.h | 70 #define SMC_SYSCON_RESET_CNTL 0x80000000 macro
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| /Linux-v5.4/drivers/gpu/drm/radeon/ |
| D | si_smc.c | 115 u32 tmp = RREG32_SMC(SMC_SYSCON_RESET_CNTL); in si_start_smc() 119 WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp); in si_start_smc() 131 tmp = RREG32_SMC(SMC_SYSCON_RESET_CNTL); in si_reset_smc() 133 WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp); in si_reset_smc() 163 u32 rst = RREG32_SMC(SMC_SYSCON_RESET_CNTL); in si_is_smc_running()
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| D | ci_smc.c | 116 u32 tmp = RREG32_SMC(SMC_SYSCON_RESET_CNTL); in ci_start_smc() 119 WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp); in ci_start_smc() 124 u32 tmp = RREG32_SMC(SMC_SYSCON_RESET_CNTL); in ci_reset_smc() 127 WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp); in ci_reset_smc()
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| D | sid.h | 68 #define SMC_SYSCON_RESET_CNTL 0x80000000 macro
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| D | cikd.h | 72 #define SMC_SYSCON_RESET_CNTL 0x80000000 macro
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| /Linux-v5.4/drivers/gpu/drm/amd/powerplay/smumgr/ |
| D | vegam_smumgr.c | 109 SMC_SYSCON_RESET_CNTL, rst_reg, 1); in vegam_start_smu_in_protection_mode() 123 SMC_SYSCON_RESET_CNTL, rst_reg, 0); in vegam_start_smu_in_protection_mode() 144 SMC_SYSCON_RESET_CNTL, rst_reg, 1); in vegam_start_smu_in_protection_mode() 147 SMC_SYSCON_RESET_CNTL, rst_reg, 0); in vegam_start_smu_in_protection_mode() 168 SMC_SYSCON_RESET_CNTL, in vegam_start_smu_in_non_protection_mode() 182 SMC_SYSCON_RESET_CNTL, rst_reg, 0); in vegam_start_smu_in_non_protection_mode()
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| D | polaris10_smumgr.c | 208 SMC_SYSCON_RESET_CNTL, rst_reg, 1); in polaris10_start_smu_in_protection_mode() 222 SMC_SYSCON_RESET_CNTL, rst_reg, 0); in polaris10_start_smu_in_protection_mode() 243 SMC_SYSCON_RESET_CNTL, rst_reg, 1); in polaris10_start_smu_in_protection_mode() 246 SMC_SYSCON_RESET_CNTL, rst_reg, 0); in polaris10_start_smu_in_protection_mode() 267 SMC_SYSCON_RESET_CNTL, in polaris10_start_smu_in_non_protection_mode() 281 SMC_SYSCON_RESET_CNTL, rst_reg, 0); in polaris10_start_smu_in_non_protection_mode()
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| D | fiji_smumgr.c | 108 SMC_SYSCON_RESET_CNTL, rst_reg, 1); in fiji_start_smu_in_protection_mode() 123 SMC_SYSCON_RESET_CNTL, rst_reg, 0); in fiji_start_smu_in_protection_mode() 176 SMC_SYSCON_RESET_CNTL, rst_reg, 1); in fiji_start_smu_in_non_protection_mode() 191 SMC_SYSCON_RESET_CNTL, rst_reg, 0); in fiji_start_smu_in_non_protection_mode()
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| D | tonga_smumgr.c | 103 SMC_SYSCON_RESET_CNTL, rst_reg, 1); in tonga_start_in_protection_mode() 119 SMC_SYSCON_RESET_CNTL, rst_reg, 0); in tonga_start_in_protection_mode() 169 SMC_SYSCON_RESET_CNTL, rst_reg, 1); in tonga_start_in_non_protection_mode() 185 SMC_SYSCON_RESET_CNTL, rst_reg, 0); in tonga_start_in_non_protection_mode()
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| D | iceland_smumgr.c | 112 SMC_SYSCON_RESET_CNTL, rst_reg, 0); in iceland_start_smc() 120 SMC_SYSCON_RESET_CNTL, in iceland_reset_smc()
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| D | ci_smumgr.c | 1901 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_RESET_CNTL, rst_reg, 0); in ci_start_smc() 2361 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_RESET_CNTL, rst_reg, 1); in ci_upload_firmware()
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