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Searched refs:SET_REG_BIT (Results 1 – 3 of 3) sorted by relevance

/Linux-v5.4/arch/mips/include/asm/mach-pnx833x/
Dgpio.h22 #define SET_REG_BIT(reg, bit) do { (reg |= (1 << (bit))); } while (0) macro
53 SET_REG_BIT(PNX833X_PIO_DIR, pin); in pnx833x_gpio_select_output()
55 SET_REG_BIT(PNX833X_PIO_DIR2, pin & 31); in pnx833x_gpio_select_output()
69 SET_REG_BIT(PNX833X_PIO_SEL, pin); in pnx833x_gpio_select_function_alt()
71 SET_REG_BIT(PNX833X_PIO_SEL2, pin & 31); in pnx833x_gpio_select_function_alt()
88 SET_REG_BIT(PNX833X_PIO_OUT, pin); in pnx833x_gpio_write()
93 SET_REG_BIT(PNX833X_PIO_OUT2, pin & 31); in pnx833x_gpio_write()
112 SET_REG_BIT(PNX833X_PIO_INT_LO, pin); in pnx833x_gpio_setup_irq()
116 SET_REG_BIT(PNX833X_PIO_INT_HI, pin); in pnx833x_gpio_setup_irq()
120 SET_REG_BIT(PNX833X_PIO_INT_EDGE, pin); in pnx833x_gpio_setup_irq()
[all …]
/Linux-v5.4/drivers/net/ethernet/apm/xgene-v2/
Dmac.c37 SET_REG_BIT(&rgmii, CFG_SPEED_125, 0); in xge_mac_set_speed()
44 SET_REG_BIT(&rgmii, CFG_SPEED_125, 0); in xge_mac_set_speed()
51 SET_REG_BIT(&rgmii, CFG_SPEED_125, 1); in xge_mac_set_speed()
Dmac.h78 #define SET_REG_BIT(var, field, val) \ macro