Searched refs:SDRAM (Results 1 – 25 of 49) sorted by relevance
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| /Linux-v5.4/Documentation/devicetree/bindings/memory-controllers/ |
| D | mvebu-sdram-controller.txt | 1 Device Tree bindings for MVEBU SDRAM controllers
3 The Marvell EBU SoCs all have a SDRAM controller. The SDRAM controller
8 Armada XP SDRAM controller.
14 include all SDRAM controller registers as per the datasheet.
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| D | renesas,dbsc.txt | 7 (DBSC3)", "SDRAM Bus State Controller (SBSC)").
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| /Linux-v5.4/arch/arm/mach-s3c24xx/ |
| D | sleep-s3c2410.S | 39 orr r7, r7, #S3C2410_REFRESH_SELF @ SDRAM sleep command
40 orr r8, r8, #S3C2410_MISCCR_SDSLEEP @ SDRAM power-down signals
51 streq r7, [r4] @ SDRAM sleep command
52 streq r8, [r5] @ SDRAM power-down config
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| /Linux-v5.4/Documentation/devicetree/bindings/arm/altera/ |
| D | socfpga-sdram-edac.txt | 1 Altera SOCFPGA SDRAM Error Detection & Correction [EDAC]
2 The EDAC accesses a range of registers in the SDRAM controller.
7 - interrupts : Should contain the SDRAM ECC IRQ in the
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| D | socfpga-sdram-controller.txt | 1 Altera SOCFPGA SDRAM Controller
5 syscon is required by the Altera SOCFPGA SDRAM EDAC.
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| /Linux-v5.4/arch/arm/mach-pxa/ |
| D | sleep.S | 54 @ prepare SDRAM refresh settings
58 @ enable SDRAM self-refresh mode
95 @ prepare SDRAM refresh settings
99 @ enable SDRAM self-refresh mode
106 @ We keep the change-down close to the actual suspend on SDRAM
159 @ external accesses after SDRAM is put in self-refresh mode
165 @ put SDRAM into self-refresh
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| /Linux-v5.4/Documentation/driver-api/memory-devices/ |
| D | ti-emif.rst | 4 TI EMIF SDRAM Controller Driver
29 SoCs. EMIF is an SDRAM controller that, based on its revision,
30 supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
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| /Linux-v5.4/drivers/memory/ |
| D | Kconfig | 14 Data from JEDEC specs for DDR SDRAM memories,
17 DDR SDRAM controllers.
28 bool "Atmel (Multi-port DDR-)SDRAM Controller"
32 This driver is for Atmel SDRAM Controller or Atmel Multi-port
33 DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
66 SoCs. EMIF is an SDRAM controller that, based on its revision,
67 supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
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| /Linux-v5.4/Documentation/devicetree/bindings/arm/omap/ |
| D | dmm.txt | 4 SDRAM controllers (called EMIFs on OMAP). DMM manages various aspects of memory
5 accesses such as priority generation amongst initiators, configuration of SDRAM
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| /Linux-v5.4/Documentation/devicetree/bindings/memory-controllers/ti/ |
| D | emif.txt | 1 * EMIF family of TI SDRAM controllers
3 EMIF - External Memory Interface - is an SDRAM controller used in
57 has capability for generating SDRAM temperature alerts
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| /Linux-v5.4/arch/powerpc/boot/dts/ |
| D | sbc8548.dts | 24 0x3 0x0 0xf0000000 0x04000000 /*64MB SDRAM*/
25 0x4 0x0 0xf4000000 0x04000000 /*64MB SDRAM*/
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| D | sbc8548-altflash.dts | 27 0x3 0x0 0xf0000000 0x04000000 /*64MB SDRAM*/
28 0x4 0x0 0xf4000000 0x04000000 /*64MB SDRAM*/
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| /Linux-v5.4/drivers/video/fbdev/omap/ |
| D | Kconfig | 53 bool "Set DMA SDRAM access priority high"
57 (SDRAM) this will speed up graphics DMA operations.
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| /Linux-v5.4/Documentation/devicetree/bindings/fpga/ |
| D | altera-fpga2sdram-bridge.txt | 1 Altera FPGA To SDRAM Bridge Driver
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| /Linux-v5.4/arch/arm/mach-omap2/ |
| D | Kconfig | 143 bool "OMAP2 SDRAM Controller support"
229 access SDRAM during CORE DVFS, select Y here. This should boost
230 SDRAM performance at lower CORE OPPs. There are relatively few
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| /Linux-v5.4/arch/powerpc/boot/dts/fsl/ |
| D | sbc8641d.dts | 29 3 0 0xe0000000 0x04000000 // 64MB LB SDRAM (CS3)
30 4 0 0xe4000000 0x04000000 // 64MB LB SDRAM (CS4)
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| /Linux-v5.4/arch/arm/mach-omap1/ |
| D | sleep.S | 81 @ prepare to put SDRAM into self-refresh manually
166 @ prepare to put SDRAM into self-refresh manually
236 @ Prepare to put SDRAM into self-refresh manually
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| /Linux-v5.4/arch/arm/mach-lpc32xx/ |
| D | suspend.S | 52 @ Wait for SDRAM busy status to go busy and then idle
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| /Linux-v5.4/Documentation/arm/stm32/ |
| D | stm32f429-overview.rst | 13 - External memory support through FMC controller (PSRAM, SDRAM, NOR, NAND)
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| D | stm32h743-overview.rst | 13 - FMC controller to connect SDRAM, NOR and NAND memories
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| D | stm32f746-overview.rst | 13 - FMC controller to connect SDRAM, NOR and NAND memories
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| D | stm32f769-overview.rst | 13 - FMC controller to connect SDRAM, NOR and NAND memories
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| /Linux-v5.4/Documentation/devicetree/bindings/clock/ |
| D | mvebu-core-clock.txt | 30 3 = hclk (SDRAM Controller Internal Clock)
31 4 = dclk (SDRAM Interface Clock)
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| /Linux-v5.4/arch/arm/boot/dts/ |
| D | intel-ixp43x-gateworks-gw2358.dts | 17 /* 128 MB SDRAM */
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| D | intel-ixp42x-linksys-nslu2.dts | 18 /* 32 MB SDRAM */
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