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Searched refs:SCLK_SPDIF (Results 1 – 20 of 20) sorted by relevance

/Linux-v5.4/include/dt-bindings/clock/
Drk3036-cru.h27 #define SCLK_SPDIF 83 macro
Dexynos7-clk.h119 #define SCLK_SPDIF 27 macro
Ds5pv210.h187 #define SCLK_SPDIF 165 macro
Drk3188-cru-common.h34 #define SCLK_SPDIF 78 macro
Drk3128-cru.h30 #define SCLK_SPDIF 83 macro
Drk3228-cru.h30 #define SCLK_SPDIF 83 macro
Drk3288-cru.h38 #define SCLK_SPDIF 83 macro
Drk3328-cru.h35 #define SCLK_SPDIF 46 macro
/Linux-v5.4/Documentation/devicetree/bindings/sound/
Drockchip-spdif.txt43 clocks = <&cru HCLK_SPDIF>, <&cru SCLK_SPDIF>;
/Linux-v5.4/drivers/clk/rockchip/
Dclk-rk3036.c164 MUX(SCLK_SPDIF, "sclk_spdif", mux_spdif_p, 0,
Dclk-rk3128.c181 MUX(SCLK_SPDIF, "sclk_spdif", mux_sclk_spdif_p, CLK_SET_RATE_PARENT,
Dclk-rk3228.c197 MUX(SCLK_SPDIF, "sclk_spdif", mux_sclk_spdif_p, CLK_SET_RATE_PARENT,
Dclk-rk3328.c248 MUX(SCLK_SPDIF, "sclk_spdif", mux_spdif_p, CLK_SET_RATE_PARENT,
Dclk-rk3188.c254 MUX(SCLK_SPDIF, "sclk_spdif", mux_sclk_spdif_p, CLK_SET_RATE_PARENT,
Dclk-rk3288.c376 GATE(SCLK_SPDIF, "sclk_spdif", "spdif_mux", CLK_SET_RATE_PARENT,
/Linux-v5.4/drivers/clk/samsung/
Dclk-s5pv210.c669 GATE(SCLK_SPDIF, "sclk_spdif", "mout_spdif", CLK_SRC_MASK0, 27,
Dclk-exynos7.c793 GATE(SCLK_SPDIF, "sclk_spdif_user", "sclk_spdif",
/Linux-v5.4/arch/arm/boot/dts/
Drk3188.dtsi188 clocks = <&cru HCLK_SPDIF>, <&cru SCLK_SPDIF>;
Drk322x.dtsi183 clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF_8CH>;
/Linux-v5.4/arch/arm64/boot/dts/rockchip/
Drk3328.dtsi219 clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF_8CH>;