| /Linux-v5.4/Documentation/devicetree/bindings/sound/ |
| D | nau8824.txt | 30 …eshold for each button. Array that contains up to 8 buttons configuration. SAR value is calculated…
31 SAR = 255 * MICBIAS / SAR_VOLTAGE * R / (2000 + R)
47 - nuvoton,sar-compare-time: SAR compare time
53 - nuvoton,sar-sampling-time: SAR sampling time
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| D | nau8825.txt | 34 …eshold for each button. Array that contains up to 8 buttons configuration. SAR value is calculated…
35 SAR = 255 * MICBIAS / SAR_VOLTAGE * R / (2000 + R)
51 - nuvoton,sar-compare-time: SAR compare time
57 - nuvoton,sar-sampling-time: SAR sampling time
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| /Linux-v5.4/drivers/dma/ |
| D | txx9dmac.h | 72 u64 SAR; /* Source Address Register */ member
82 u32 SAR; member
206 u64 SAR; member
212 u32 SAR; member
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| D | txx9dmac.c | 290 channel64_readq(dc, SAR), in txx9dmac_dump_regs()
302 channel32_readl(dc, SAR), in txx9dmac_dump_regs()
316 channel_writeq(dc, SAR, 0); in txx9dmac_reset_chan()
320 channel_writel(dc, SAR, 0); in txx9dmac_reset_chan()
474 (u64)desc->CHAR, desc->SAR, desc->DAR, desc->CNTR); in txx9dmac_dump_desc()
479 (u64)desc->CHAR, desc->SAR, desc->DAR, desc->CNTR, in txx9dmac_dump_desc()
487 d->CHAR, d->SAR, d->DAR, d->CNTR); in txx9dmac_dump_desc()
492 d->CHAR, d->SAR, d->DAR, d->CNTR, in txx9dmac_dump_desc()
755 desc->hwdesc.SAR = src + offset; in txx9dmac_prep_dma_memcpy()
761 desc->hwdesc32.SAR = src + offset; in txx9dmac_prep_dma_memcpy()
[all …]
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| D | idma64.c | 94 channel_writeq(idma64c, SAR, 0); in idma64_chan_start()
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| D | pl330.c | 338 SAR = 0, enumerator
724 dst == SAR ? "SAR" : (dst == DAR ? "DAR" : "CCR"), val); in _emit_MOV()
1386 off += _emit_MOV(dry_run, &buf[off], SAR, x->src_addr); in _setup_xfer()
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| /Linux-v5.4/Documentation/devicetree/bindings/iio/adc/ |
| D | amlogic,meson-saradc.txt | 1 * Amlogic Meson SAR (Successive Approximation Register) A/D converter
19 - "core" for the SAR ADC core clock
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| D | rockchip-saradc.txt | 1 Rockchip Successive Approximation Register (SAR) A/D Converter bindings
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| /Linux-v5.4/arch/sh/include/asm/ |
| D | dma-register.h | 14 #define SAR 0x00 /* Source Address Register */ macro
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| /Linux-v5.4/drivers/i2c/busses/ |
| D | i2c-rcar.c | 68 #define SAR (1 << 0) /* slave addr received */ macro
571 if (ssr_filtered & SAR) { in rcar_i2c_slave_irq()
576 rcar_i2c_write(priv, ICSIER, SDE | SSR | SAR); in rcar_i2c_slave_irq()
580 rcar_i2c_write(priv, ICSIER, SDR | SSR | SAR); in rcar_i2c_slave_irq()
583 rcar_i2c_write(priv, ICSSR, ~SAR & 0xff); in rcar_i2c_slave_irq()
589 rcar_i2c_write(priv, ICSIER, SAR | SSR); in rcar_i2c_slave_irq()
853 rcar_i2c_write(priv, ICSIER, SAR | SSR); in rcar_reg_slave()
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| /Linux-v5.4/drivers/net/wireless/ath/ath9k/ |
| D | Kconfig | 90 TX99 support enables Specific Absorption Rate (SAR) testing.
91 SAR is the unit of measurement for the amount of radio frequency(RF)
93 limits used are expressed in the terms of SAR, which is a measure
98 governmental SAR regulations.
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| /Linux-v5.4/Documentation/devicetree/bindings/clock/ |
| D | mvebu-core-clock.txt | 4 reading the Sample-At-Reset (SAR) register. The core clock consumer should
67 - reg : shall be the register address of the Sample-At-Reset (SAR) register
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| /Linux-v5.4/drivers/dma/sh/ |
| D | shdmac.c | 38 #define SAR 0x00 /* Source Address Register */ macro
217 sh_dmae_writel(sh_chan, hw->sar, SAR); in dmae_set_reg()
460 u32 sar_buf = sh_dmae_readl(sh_chan, SAR); in sh_dmae_desc_completed()
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| /Linux-v5.4/arch/xtensa/kernel/ |
| D | coprocessor.S | 190 ssl a3 # SAR: 32 - coprocessor_number
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| D | entry.S | 1259 ssr a0 # save in SAR for later.
1521 rsr a3, sar # WB is still in SAR
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| /Linux-v5.4/Documentation/devicetree/bindings/mfd/ |
| D | rohm,bd70528-pmic.txt | 8 dual-input power path, 10 bit SAR ADC for battery temperature monitor and
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| /Linux-v5.4/arch/sh/drivers/dma/ |
| D | dma-sh.c | 219 __raw_writel(chan->sar, (dma_base_addr(chan->chan) + SAR)); in sh_dmac_xfer_dma()
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| /Linux-v5.4/drivers/dma/dw/ |
| D | regs.h | 40 DW_REG(SAR); /* Source Address Register */
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| D | core.c | 139 channel_readl(dwc, SAR), in dwc_dump_chan_regs()
168 channel_writel(dwc, SAR, lli_read(desc, sar)); in dwc_do_single_block()
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| /Linux-v5.4/arch/arm/mach-omap2/ |
| D | sleep44xx.S | 148 ldreq r0, [r8, #L2X0_SAVE_OFFSET0] @ Retrieve L2 state from SAR
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| /Linux-v5.4/Documentation/parisc/ |
| D | registers.rst | 19 CR11 as specified by ABI (SAR)
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| /Linux-v5.4/arch/arm/boot/dts/ |
| D | armada-xp-synology-ds414.dts | 72 * pin being sampled at reset (bit 0 of SAR).
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| /Linux-v5.4/drivers/iio/adc/ |
| D | Kconfig | 624 tristate "Amlogic Meson SAR ADC driver"
629 Say yes here to build support for the SAR ADC found in Amlogic Meson
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| /Linux-v5.4/arch/x86/lib/ |
| D | x86-opcode-map.txt | 894 7: SAR
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| /Linux-v5.4/tools/arch/x86/lib/ |
| D | x86-opcode-map.txt | 894 7: SAR
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