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Searched refs:RTC_SOC_BASE_ADDRESS (Results 1 – 4 of 4) sorted by relevance

/Linux-v5.4/drivers/net/wireless/ath/ath10k/
Dhw.c756 addr = (RTC_SOC_BASE_ADDRESS | EFUSE_OFFSET); in ath10k_hw_qca6174_enable_pll_clock()
768 addr = (RTC_SOC_BASE_ADDRESS | BB_PLL_CONFIG_OFFSET); in ath10k_hw_qca6174_enable_pll_clock()
793 addr = (RTC_SOC_BASE_ADDRESS | SOC_CORE_CLK_CTRL_OFFSET); in ath10k_hw_qca6174_enable_pll_clock()
875 addr = (RTC_SOC_BASE_ADDRESS | SOC_CPU_CLOCK_OFFSET); in ath10k_hw_qca6174_enable_pll_clock()
Dpci.c692 return ath10k_pci_read32(ar, RTC_SOC_BASE_ADDRESS + addr); in ath10k_pci_soc_read32()
697 ath10k_pci_write32(ar, RTC_SOC_BASE_ADDRESS + addr, val); in ath10k_pci_soc_write32()
2570 val = ath10k_pci_read32(ar, RTC_SOC_BASE_ADDRESS + in ath10k_pci_warm_reset_cpu()
2572 ath10k_pci_write32(ar, RTC_SOC_BASE_ADDRESS + SOC_RESET_CONTROL_ADDRESS, in ath10k_pci_warm_reset_cpu()
2580 val = ath10k_pci_read32(ar, RTC_SOC_BASE_ADDRESS + in ath10k_pci_warm_reset_ce()
2583 ath10k_pci_write32(ar, RTC_SOC_BASE_ADDRESS + SOC_RESET_CONTROL_ADDRESS, in ath10k_pci_warm_reset_ce()
2586 ath10k_pci_write32(ar, RTC_SOC_BASE_ADDRESS + SOC_RESET_CONTROL_ADDRESS, in ath10k_pci_warm_reset_ce()
2594 val = ath10k_pci_read32(ar, RTC_SOC_BASE_ADDRESS + in ath10k_pci_warm_reset_clear_lf()
2596 ath10k_pci_write32(ar, RTC_SOC_BASE_ADDRESS + in ath10k_pci_warm_reset_clear_lf()
Dhw.h867 #define RTC_SOC_BASE_ADDRESS ar->regs->rtc_soc_base_address macro
Dahb.c70 return ath10k_ahb_read32(ar, RTC_SOC_BASE_ADDRESS + addr); in ath10k_ahb_soc_read32()