Searched refs:RP_LINK_CONTROL_STATUS_2 (Results 1 – 1 of 1) sorted by relevance
250 #define RP_LINK_CONTROL_STATUS_2 0x000000b0 macro702 value = readl(port->base + RP_LINK_CONTROL_STATUS_2); in tegra_pcie_apply_sw_fixup()705 writel(value, port->base + RP_LINK_CONTROL_STATUS_2); in tegra_pcie_apply_sw_fixup()2410 value = readl(port->base + RP_LINK_CONTROL_STATUS_2); in tegra_pcie_change_link_speed()2413 writel(value, port->base + RP_LINK_CONTROL_STATUS_2); in tegra_pcie_change_link_speed()
