Searched refs:RLC_CNTL (Results 1 – 12 of 12) sorted by relevance
/Linux-v5.4/drivers/gpu/drm/radeon/ |
D | si.c | 5209 orig = data = RREG32(RLC_CNTL); in si_halt_rlc() 5213 WREG32(RLC_CNTL, data); in si_halt_rlc() 5225 tmp = RREG32(RLC_CNTL); in si_update_rlc() 5227 WREG32(RLC_CNTL, rlc); in si_update_rlc() 5821 WREG32(RLC_CNTL, 0); in si_rlc_stop() 5830 WREG32(RLC_CNTL, RLC_ENABLE); in si_rlc_start()
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D | r600.c | 1705 WREG32(RLC_CNTL, 0); in r600_gpu_soft_reset() 1837 WREG32(RLC_CNTL, 0); in r600_gpu_pci_config_reset() 3546 WREG32(RLC_CNTL, 0); in r600_rlc_stop() 3551 WREG32(RLC_CNTL, RLC_ENABLE); in r600_rlc_start()
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D | sid.h | 1300 #define RLC_CNTL 0xC300 macro
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D | cik.c | 5825 tmp = RREG32(RLC_CNTL); in cik_update_rlc() 5827 WREG32(RLC_CNTL, rlc); in cik_update_rlc() 5834 orig = data = RREG32(RLC_CNTL); in cik_halt_rlc() 5840 WREG32(RLC_CNTL, data); in cik_halt_rlc() 5892 WREG32(RLC_CNTL, 0); in cik_rlc_stop() 5908 WREG32(RLC_CNTL, RLC_ENABLE); in cik_rlc_start()
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D | cikd.h | 1393 #define RLC_CNTL 0xC300 macro
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D | evergreend.h | 384 #define RLC_CNTL 0x3f00 macro
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D | r600d.h | 685 #define RLC_CNTL 0x3f00 macro
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D | evergreen.c | 4378 WREG32(RLC_CNTL, mask); in evergreen_rlc_start()
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/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/ |
D | sid.h | 1329 #define RLC_CNTL 0x30C0 macro
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D | gfx_v10_0.c | 1815 tmp = REG_SET_FIELD(tmp, RLC_CNTL, RLC_ENABLE_F32, 0); in gfx_v10_0_rlc_stop() 1856 WREG32_FIELD15(GC, 0, RLC_CNTL, RLC_ENABLE_F32, 1); in gfx_v10_0_rlc_start() 4014 return (REG_GET_FIELD(rlc_cntl, RLC_CNTL, RLC_ENABLE_F32)) ? true : false; in gfx_v10_0_is_rlc_enabled()
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D | gfx_v9_0.c | 2951 WREG32_FIELD15(GC, 0, RLC_CNTL, RLC_ENABLE_F32, 0); in gfx_v9_0_rlc_stop() 2970 WREG32_FIELD15(GC, 0, RLC_CNTL, RLC_ENABLE_F32, 1); in gfx_v9_0_rlc_start()
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D | gfx_v8_0.c | 4104 WREG32_FIELD(RLC_CNTL, RLC_ENABLE_F32, 0); in gfx_v8_0_rlc_stop() 4121 WREG32_FIELD(RLC_CNTL, RLC_ENABLE_F32, 1); in gfx_v8_0_rlc_start()
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