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Searched refs:RG_PE1_H_PLL_IR (Results 1 – 1 of 1) sorted by relevance

/Linux-v5.4/drivers/staging/mt7621-pci-phy/
Dpci-mt7621-phy.c42 #define RG_PE1_H_PLL_IR GENMASK(15, 12) macro
213 val &= ~(RG_PE1_H_PLL_BC | RG_PE1_H_PLL_BP | RG_PE1_H_PLL_IR | in mt7621_set_phy_for_ssc()