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Searched refs:RG_PE1_H_PLL_FBKSEL_VAL (Results 1 – 1 of 1) sorted by relevance

/Linux-v5.4/drivers/staging/mt7621-pci-phy/
Dpci-mt7621-phy.c53 #define RG_PE1_H_PLL_FBKSEL_VAL(x) ((0x3 & (x)) << 4) macro
178 val |= RG_PE1_H_PLL_FBKSEL_VAL(0x01); in mt7621_set_phy_for_ssc()