| /Linux-v5.4/drivers/gpu/drm/gma500/ |
| D | mdfld_dsi_output.h | 86 #define REG_OFFSET(pipe) (CHECK_PIPE(pipe) * 0x400) macro
89 #define MIPI_DEVICE_READY_REG(pipe) (0xb000 + REG_OFFSET(pipe))
90 #define MIPI_INTR_STAT_REG(pipe) (0xb004 + REG_OFFSET(pipe))
91 #define MIPI_INTR_EN_REG(pipe) (0xb008 + REG_OFFSET(pipe))
92 #define MIPI_DSI_FUNC_PRG_REG(pipe) (0xb00c + REG_OFFSET(pipe))
93 #define MIPI_HS_TX_TIMEOUT_REG(pipe) (0xb010 + REG_OFFSET(pipe))
94 #define MIPI_LP_RX_TIMEOUT_REG(pipe) (0xb014 + REG_OFFSET(pipe))
95 #define MIPI_TURN_AROUND_TIMEOUT_REG(pipe) (0xb018 + REG_OFFSET(pipe))
96 #define MIPI_DEVICE_RESET_TIMER_REG(pipe) (0xb01c + REG_OFFSET(pipe))
97 #define MIPI_DPI_RESOLUTION_REG(pipe) (0xb020 + REG_OFFSET(pipe))
[all …]
|
| /Linux-v5.4/arch/arm64/kvm/ |
| D | regmap.c | 17 #define REG_OFFSET(_reg) \ macro
20 #define USR_REG_OFFSET(R) REG_OFFSET(compat_usr(R))
30 REG_OFFSET(pc)
38 REG_OFFSET(compat_r8_fiq), /* r8 */
39 REG_OFFSET(compat_r9_fiq), /* r9 */
40 REG_OFFSET(compat_r10_fiq), /* r10 */
41 REG_OFFSET(compat_r11_fiq), /* r11 */
42 REG_OFFSET(compat_r12_fiq), /* r12 */
43 REG_OFFSET(compat_sp_fiq), /* r13 */
44 REG_OFFSET(compat_lr_fiq), /* r14 */
[all …]
|
| /Linux-v5.4/arch/arm/kvm/ |
| D | emulate.c | 23 #define REG_OFFSET(_reg) \ macro
26 #define USR_REG_OFFSET(_num) REG_OFFSET(usr_regs.uregs[_num])
43 REG_OFFSET(fiq_regs[0]), /* r8 */
44 REG_OFFSET(fiq_regs[1]), /* r9 */
45 REG_OFFSET(fiq_regs[2]), /* r10 */
46 REG_OFFSET(fiq_regs[3]), /* r11 */
47 REG_OFFSET(fiq_regs[4]), /* r12 */
48 REG_OFFSET(fiq_regs[5]), /* r13 */
49 REG_OFFSET(fiq_regs[6]), /* r14 */
59 REG_OFFSET(irq_regs[0]), /* r13 */
[all …]
|
| /Linux-v5.4/arch/mips/ar7/ |
| D | irq.c | 19 #define REG_OFFSET(irq, reg) ((irq) / 32 * 0x4 + reg * 0x10) macro
22 #define CR_OFFSET(irq) (REG_OFFSET(irq, 1)) /* 0x10 */
24 #define ESR_OFFSET(irq) (REG_OFFSET(irq, 2)) /* 0x20 */
26 #define ECR_OFFSET(irq) (REG_OFFSET(irq, 3)) /* 0x30 */
30 #define PM_OFFSET(irq) (REG_OFFSET(irq, 5)) /* 0x50 */
31 #define TM_OFFSET(irq) (REG_OFFSET(irq, 6)) /* 0x60 */
|
| /Linux-v5.4/arch/arm/mach-ixp4xx/ |
| D | gtwx5715-setup.c | 71 #define REG_OFFSET 3 macro
73 #define REG_OFFSET 0 macro
98 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
|
| D | coyote-setup.c | 67 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
104 (char*)(IXP4XX_UART1_BASE_VIRT + REG_OFFSET); in coyote_init()
|
| D | avila-setup.c | 89 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
98 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
|
| D | dsmg600-setup.c | 137 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
146 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
|
| D | omixp-setup.c | 127 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
135 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
|
| D | vulcan-setup.c | 84 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
93 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
|
| D | nas100d-setup.c | 140 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
149 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
|
| D | nslu2-setup.c | 160 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
169 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
|
| D | fsg-setup.c | 100 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
109 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
|
| D | ixdp425-setup.c | 162 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
171 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
|
| D | wg302v2-setup.c | 62 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
|
| D | gateway7001-setup.c | 61 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
|
| D | goramo_mlr.c | 245 REG_OFFSET,
255 REG_OFFSET,
|
| /Linux-v5.4/arch/arm/mach-ixp4xx/include/mach/ |
| D | platform.h | 22 #define REG_OFFSET 0 macro
24 #define REG_OFFSET 3 macro
|
| /Linux-v5.4/drivers/rtc/ |
| D | rtc-pcf8523.c | 35 #define REG_OFFSET 0x0e macro
309 err = pcf8523_read(client, REG_OFFSET, &value); in pcf8523_rtc_read_offset()
334 return pcf8523_write(client, REG_OFFSET, value); in pcf8523_rtc_set_offset()
|
| /Linux-v5.4/drivers/pinctrl/spear/ |
| D | pinctrl-plgpio.c | 26 #define REG_OFFSET(base, reg, pin) (base + reg + (pin / MAX_GPIO_PER_REG) \ macro
83 void __iomem *reg_off = REG_OFFSET(base, reg, pin); in is_plgpio_set()
92 void __iomem *reg_off = REG_OFFSET(base, reg, pin); in plgpio_reg_set()
101 void __iomem *reg_off = REG_OFFSET(base, reg, pin); in plgpio_reg_reset()
340 reg_off = REG_OFFSET(plgpio->base, plgpio->regs.eit, offset); in plgpio_irq_set_type()
|
| /Linux-v5.4/sound/soc/sh/ |
| D | siu_dai.c | 35 #define REG_OFFSET 0xc000 macro
763 info->reg = devm_ioremap(&pdev->dev, res->start + REG_OFFSET, in siu_probe()
764 resource_size(res) - REG_OFFSET); in siu_probe()
|
