Searched refs:REG_FPGA0_IQK (Results 1 – 4 of 4) sorted by relevance
/Linux-v5.4/drivers/net/wireless/realtek/rtl8xxxu/ |
D | rtl8xxxu_8723b.c | 569 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8723bu_iqk_path_a() 571 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8723bu_iqk_path_a() 606 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8723bu_iqk_path_a() 609 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8723bu_iqk_path_a() 642 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8723bu_iqk_path_a() 644 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8723bu_iqk_path_a() 679 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8723bu_rx_iqk_path_a() 681 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8723bu_rx_iqk_path_a() 716 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8723bu_rx_iqk_path_a() 719 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8723bu_rx_iqk_path_a() [all …]
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D | rtl8xxxu_8192e.c | 688 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000); in rtl8192eu_iqk_path_a() 690 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000); in rtl8192eu_iqk_path_a() 729 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00); in rtl8192eu_rx_iqk_path_a() 742 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000); in rtl8192eu_rx_iqk_path_a() 777 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000); in rtl8192eu_rx_iqk_path_a() 787 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000); in rtl8192eu_rx_iqk_path_a() 799 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000); in rtl8192eu_rx_iqk_path_a() 825 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000); in rtl8192eu_rx_iqk_path_a() 845 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000); in rtl8192eu_iqk_path_b() 847 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000); in rtl8192eu_iqk_path_b() [all …]
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D | rtl8xxxu_regs.h | 1021 #define REG_FPGA0_IQK 0x0e28 macro
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D | rtl8xxxu_core.c | 3204 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000); in rtl8xxxu_phy_iqcalibrate() 3245 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x0); in rtl8xxxu_phy_iqcalibrate() 3247 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000); in rtl8xxxu_phy_iqcalibrate() 3278 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0); in rtl8xxxu_phy_iqcalibrate()
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