Searched refs:REG_DSI_28nm_PHY_PLL_POSTDIV1_CFG (Results 1 – 2 of 2) sorted by relevance
448 pll_read(base + REG_DSI_28nm_PHY_PLL_POSTDIV1_CFG); in dsi_pll_28nm_save_state()470 pll_write(base + REG_DSI_28nm_PHY_PLL_POSTDIV1_CFG, in dsi_pll_28nm_restore_state()536 REG_DSI_28nm_PHY_PLL_POSTDIV1_CFG, in pll_28nm_register()
983 #define REG_DSI_28nm_PHY_PLL_POSTDIV1_CFG 0x00000004 macro
