Searched refs:REG_DSI_28nm_PHY_PLL_LPFC2_CFG (Results 1 – 2 of 2) sorted by relevance
159 pll_write(base + REG_DSI_28nm_PHY_PLL_LPFC2_CFG, 0x15); in dsi_pll_28nm_clk_set_rate()
1012 #define REG_DSI_28nm_PHY_PLL_LPFC2_CFG 0x00000034 macro
