Searched refs:REG_A6XX_PDC_GPU_TCS1_CMD0_DATA (Results 1 – 2 of 2) sorted by relevance
479 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CMD0_DATA, 1); in a6xx_gmu_rpmh_init()482 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CMD0_DATA + 4, 0x0); in a6xx_gmu_rpmh_init()485 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CMD0_DATA + 8, 0x0); in a6xx_gmu_rpmh_init()
5234 #define REG_A6XX_PDC_GPU_TCS1_CMD0_DATA 0x00001577 macro
