Searched refs:REG_A6XX_CP_SQE_STAT_ADDR (Results 1 – 3 of 3) sorted by relevance
362 { "CP_SEQ_STAT", REG_A6XX_CP_SQE_STAT_ADDR,
619 gpu_write(gpu, REG_A6XX_CP_SQE_STAT_ADDR, 1); in a6xx_cp_hw_err_irq()
1139 #define REG_A6XX_CP_SQE_STAT_ADDR 0x00000908 macro
